1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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619 */
620}
621
622void
623FastInstructionAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst)
624{
625 if (FullSystem) {
626 SparcFaultBase::invoke(tc, inst);
627 return;
628 }
629
630 Process *p = tc->getProcessPtr();
631 TlbEntry entry;
632 bool success = p->pTable->lookup(vaddr, entry);
633 if (!success) {
634 panic("Tried to execute unmapped address %#x.\n", vaddr);
635 } else {
636 Addr alignedVaddr = p->pTable->pageAlign(vaddr);
637 tc->getITBPtr()->insert(alignedVaddr, 0 /*partition id*/,
638 p->M5_pid /*context id*/, false, entry.pte);
639 }
640}
641
642void
643FastDataAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst)
644{
645 if (FullSystem) {
646 SparcFaultBase::invoke(tc, inst);
647 return;
648 }
649
650 Process *p = tc->getProcessPtr();
651 TlbEntry entry;
652 bool success = p->pTable->lookup(vaddr, entry);
653 if (!success) {
654 if (p->fixupStackFault(vaddr))
655 success = p->pTable->lookup(vaddr, entry);
656 }
657 if (!success) {
658 panic("Tried to access unmapped address %#x.\n", vaddr);
659 } else {
660 Addr alignedVaddr = p->pTable->pageAlign(vaddr);
661 tc->getDTBPtr()->insert(alignedVaddr, 0 /*partition id*/,
662 p->M5_pid /*context id*/, false, entry.pte);
663 }
664}
665
666void
667SpillNNormal::invoke(ThreadContext *tc, StaticInstPtr inst)
668{
669 if (FullSystem) {
670 SparcFaultBase::invoke(tc, inst);
671 return;
672 }
673
674 doNormalFault(tc, trapType(), false);
675
676 Process *p = tc->getProcessPtr();
677
678 //XXX This will only work in faults from a SparcLiveProcess
679 SparcLiveProcess *lp = dynamic_cast<SparcLiveProcess *>(p);
680 assert(lp);
681
682 // Then adjust the PC and NPC
683 tc->pcState(lp->readSpillStart());
684}
685
686void
687FillNNormal::invoke(ThreadContext *tc, StaticInstPtr inst)
688{
689 if (FullSystem) {
690 SparcFaultBase::invoke(tc, inst);
691 return;
692 }
693
694 doNormalFault(tc, trapType(), false);
695
696 Process *p = tc->getProcessPtr();
697
698 //XXX This will only work in faults from a SparcLiveProcess
699 SparcLiveProcess *lp = dynamic_cast<SparcLiveProcess *>(p);
700 assert(lp);
701
702 // Then adjust the PC and NPC
703 tc->pcState(lp->readFillStart());
704}
705
706void
707TrapInstruction::invoke(ThreadContext *tc, StaticInstPtr inst)
708{
709 if (FullSystem) {
710 SparcFaultBase::invoke(tc, inst);
711 return;
712 }
713
714 // In SE, this mechanism is how the process requests a service from
715 // the operating system. We'll get the process object from the thread
716 // context and let it service the request.
717
718 Process *p = tc->getProcessPtr();
719
720 SparcLiveProcess *lp = dynamic_cast<SparcLiveProcess *>(p);
721 assert(lp);
722
723 lp->handleTrap(_n, tc);
724
725 // We need to explicitly advance the pc, since that's not done for us
726 // on a faulting instruction
727 PCState pc = tc->pcState();
728 pc.advance();
729 tc->pcState(pc);
730}
731
732} // namespace SparcISA
733