asi.cc (3123:34edfd0ff545) asi.cc (3804:fa7a01dddc7a)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 12 unchanged lines hidden (view full) ---

21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 12 unchanged lines hidden (view full) ---

21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Ali Saidi
29 */
30
31#include "arch/sparc/asi.hh"
32
33namespace SparcISA
34{
35 bool AsiIsBlock(ASI asi)
36 {
37 return
38 (asi == ASI_BLK_AIUP) ||
39 (asi == ASI_BLK_AIUS) ||
30 */
31
32#include "arch/sparc/asi.hh"
33
34namespace SparcISA
35{
36 bool AsiIsBlock(ASI asi)
37 {
38 return
39 (asi == ASI_BLK_AIUP) ||
40 (asi == ASI_BLK_AIUS) ||
40 (asi == ASI_BLK_AIUPL) ||
41 (asi == ASI_BLK_AIUSL) ||
41 (asi == ASI_BLK_AIUP_L) ||
42 (asi == ASI_BLK_AIUS_L) ||
42 (asi == ASI_BLK_P) ||
43 (asi == ASI_BLK_S) ||
44 (asi == ASI_BLK_PL) ||
45 (asi == ASI_BLK_SL);
46 }
47
48 bool AsiIsPrimary(ASI asi)
49 {
50 return
51 (asi == ASI_AIUP) ||
52 (asi == ASI_BLK_AIUP) ||
43 (asi == ASI_BLK_P) ||
44 (asi == ASI_BLK_S) ||
45 (asi == ASI_BLK_PL) ||
46 (asi == ASI_BLK_SL);
47 }
48
49 bool AsiIsPrimary(ASI asi)
50 {
51 return
52 (asi == ASI_AIUP) ||
53 (asi == ASI_BLK_AIUP) ||
53 (asi == ASI_AIUPL) ||
54 (asi == ASI_BLK_AIUPL) ||
54 (asi == ASI_AIUP_L) ||
55 (asi == ASI_BLK_AIUP_L) ||
55 (asi == ASI_LDTX_AIUP) ||
56 (asi == ASI_LDTX_AIUP) ||
56 (asi == ASI_LDTX_AIUPL) ||
57 (asi == ASI_LDTX_AIUP_L) ||
57 (asi == ASI_P) ||
58 (asi == ASI_PNF) ||
59 (asi == ASI_PL) ||
60 (asi == ASI_PNFL) ||
61 (asi == ASI_PST8_P) ||
62 (asi == ASI_PST16_P) ||
63 (asi == ASI_PST32_P) ||
64 (asi == ASI_PST8_PL) ||

--- 9 unchanged lines hidden (view full) ---

74 (asi == ASI_BLK_PL);
75 }
76
77 bool AsiIsSecondary(ASI asi)
78 {
79 return
80 (asi == ASI_AIUS) ||
81 (asi == ASI_BLK_AIUS) ||
58 (asi == ASI_P) ||
59 (asi == ASI_PNF) ||
60 (asi == ASI_PL) ||
61 (asi == ASI_PNFL) ||
62 (asi == ASI_PST8_P) ||
63 (asi == ASI_PST16_P) ||
64 (asi == ASI_PST32_P) ||
65 (asi == ASI_PST8_PL) ||

--- 9 unchanged lines hidden (view full) ---

75 (asi == ASI_BLK_PL);
76 }
77
78 bool AsiIsSecondary(ASI asi)
79 {
80 return
81 (asi == ASI_AIUS) ||
82 (asi == ASI_BLK_AIUS) ||
82 (asi == ASI_AIUSL) ||
83 (asi == ASI_BLK_AIUSL) ||
83 (asi == ASI_AIUS_L) ||
84 (asi == ASI_BLK_AIUS_L) ||
84 (asi == ASI_LDTX_AIUS) ||
85 (asi == ASI_LDTX_AIUS) ||
85 (asi == ASI_LDTX_AIUSL) ||
86 (asi == ASI_LDTX_AIUS_L) ||
86 (asi == ASI_S) ||
87 (asi == ASI_SNF) ||
88 (asi == ASI_SL) ||
89 (asi == ASI_SNFL) ||
90 (asi == ASI_PST8_S) ||
91 (asi == ASI_PST16_S) ||
92 (asi == ASI_PST32_S) ||
93 (asi == ASI_PST8_SL) ||

--- 20 unchanged lines hidden (view full) ---

114
115 bool AsiIsAsIfUser(ASI asi)
116 {
117 return
118 (asi == ASI_AIUP) ||
119 (asi == ASI_AIUS) ||
120 (asi == ASI_BLK_AIUP) ||
121 (asi == ASI_BLK_AIUS) ||
87 (asi == ASI_S) ||
88 (asi == ASI_SNF) ||
89 (asi == ASI_SL) ||
90 (asi == ASI_SNFL) ||
91 (asi == ASI_PST8_S) ||
92 (asi == ASI_PST16_S) ||
93 (asi == ASI_PST32_S) ||
94 (asi == ASI_PST8_SL) ||

--- 20 unchanged lines hidden (view full) ---

115
116 bool AsiIsAsIfUser(ASI asi)
117 {
118 return
119 (asi == ASI_AIUP) ||
120 (asi == ASI_AIUS) ||
121 (asi == ASI_BLK_AIUP) ||
122 (asi == ASI_BLK_AIUS) ||
122 (asi == ASI_AIUPL) ||
123 (asi == ASI_AIUSL) ||
124 (asi == ASI_BLK_AIUPL) ||
125 (asi == ASI_BLK_AIUSL) ||
123 (asi == ASI_AIUP_L) ||
124 (asi == ASI_AIUS_L) ||
125 (asi == ASI_BLK_AIUP_L) ||
126 (asi == ASI_BLK_AIUS_L) ||
126 (asi == ASI_LDTX_AIUP) ||
127 (asi == ASI_LDTX_AIUS) ||
127 (asi == ASI_LDTX_AIUP) ||
128 (asi == ASI_LDTX_AIUS) ||
128 (asi == ASI_LDTX_AIUPL) ||
129 (asi == ASI_LDTX_AIUSL);
129 (asi == ASI_LDTX_AIUP_L) ||
130 (asi == ASI_LDTX_AIUS_L);
130 }
131
132 bool AsiIsIO(ASI asi)
133 {
134 return
135 (asi == ASI_REAL_IO) ||
136 (asi == ASI_REAL_IO_L);
137 }
138
139 bool AsiIsReal(ASI asi)
140 {
141 return
142 (asi == ASI_REAL) ||
143 (asi == ASI_REAL_IO) ||
144 (asi == ASI_REAL_L) ||
145 (asi == ASI_REAL_IO_L) ||
146 (asi == ASI_LDTX_REAL) ||
131 }
132
133 bool AsiIsIO(ASI asi)
134 {
135 return
136 (asi == ASI_REAL_IO) ||
137 (asi == ASI_REAL_IO_L);
138 }
139
140 bool AsiIsReal(ASI asi)
141 {
142 return
143 (asi == ASI_REAL) ||
144 (asi == ASI_REAL_IO) ||
145 (asi == ASI_REAL_L) ||
146 (asi == ASI_REAL_IO_L) ||
147 (asi == ASI_LDTX_REAL) ||
147 (asi == ASI_LDTX_REAL_L) ||
148 (asi == ASI_MMU_REAL);
148 (asi == ASI_LDTX_REAL_L);
149 }
150
151 bool AsiIsLittle(ASI asi)
152 {
153 return
154 (asi == ASI_NL) ||
149 }
150
151 bool AsiIsLittle(ASI asi)
152 {
153 return
154 (asi == ASI_NL) ||
155 (asi == ASI_AIUPL) ||
156 (asi == ASI_AIUSL) ||
155 (asi == ASI_AIUP_L) ||
156 (asi == ASI_AIUS_L) ||
157 (asi == ASI_REAL_L) ||
158 (asi == ASI_REAL_IO_L) ||
157 (asi == ASI_REAL_L) ||
158 (asi == ASI_REAL_IO_L) ||
159 (asi == ASI_BLK_AIUPL) ||
160 (asi == ASI_BLK_AIUSL) ||
161 (asi == ASI_LDTX_AIUPL) ||
162 (asi == ASI_LDTX_AIUSL) ||
159 (asi == ASI_BLK_AIUP_L) ||
160 (asi == ASI_BLK_AIUS_L) ||
161 (asi == ASI_LDTX_AIUP_L) ||
162 (asi == ASI_LDTX_AIUS_L) ||
163 (asi == ASI_LDTX_REAL_L) ||
164 (asi == ASI_LDTX_NL) ||
165 (asi == ASI_PL) ||
166 (asi == ASI_SL) ||
167 (asi == ASI_PNFL) ||
168 (asi == ASI_SNFL) ||
169 (asi == ASI_PST8_PL) ||
170 (asi == ASI_PST8_SL) ||

--- 13 unchanged lines hidden (view full) ---

184
185 bool AsiIsTwin(ASI asi)
186 {
187 return
188 (asi == ASI_LDTX_AIUP) ||
189 (asi == ASI_LDTX_AIUS) ||
190 (asi == ASI_LDTX_REAL) ||
191 (asi == ASI_LDTX_N) ||
163 (asi == ASI_LDTX_REAL_L) ||
164 (asi == ASI_LDTX_NL) ||
165 (asi == ASI_PL) ||
166 (asi == ASI_SL) ||
167 (asi == ASI_PNFL) ||
168 (asi == ASI_SNFL) ||
169 (asi == ASI_PST8_PL) ||
170 (asi == ASI_PST8_SL) ||

--- 13 unchanged lines hidden (view full) ---

184
185 bool AsiIsTwin(ASI asi)
186 {
187 return
188 (asi == ASI_LDTX_AIUP) ||
189 (asi == ASI_LDTX_AIUS) ||
190 (asi == ASI_LDTX_REAL) ||
191 (asi == ASI_LDTX_N) ||
192 (asi == ASI_LDTX_AIUPL) ||
193 (asi == ASI_LDTX_AIUSL) ||
192 (asi == ASI_LDTX_AIUP_L) ||
193 (asi == ASI_LDTX_AIUS_L) ||
194 (asi == ASI_LDTX_REAL_L) ||
195 (asi == ASI_LDTX_NL) ||
196 (asi == ASI_LDTX_P) ||
197 (asi == ASI_LDTX_S) ||
198 (asi == ASI_LDTX_PL) ||
199 (asi == ASI_LDTX_SL);
200 }
201

--- 41 unchanged lines hidden (view full) ---

243 return
244 (asi == ASI_SCRATCHPAD) ||
245 (asi == ASI_HYP_SCRATCHPAD);
246 }
247
248 bool AsiIsCmt(ASI asi)
249 {
250 return
194 (asi == ASI_LDTX_REAL_L) ||
195 (asi == ASI_LDTX_NL) ||
196 (asi == ASI_LDTX_P) ||
197 (asi == ASI_LDTX_S) ||
198 (asi == ASI_LDTX_PL) ||
199 (asi == ASI_LDTX_SL);
200 }
201

--- 41 unchanged lines hidden (view full) ---

243 return
244 (asi == ASI_SCRATCHPAD) ||
245 (asi == ASI_HYP_SCRATCHPAD);
246 }
247
248 bool AsiIsCmt(ASI asi)
249 {
250 return
251 (asi == ASI_CMT_PER_STRAND) ||
252 (asi == ASI_CMT_SHARED);
251 (asi == ASI_CMT_PER_STRAND);
253 }
254
255 bool AsiIsQueue(ASI asi)
256 {
257 return asi == ASI_QUEUE;
258 }
259
252 }
253
254 bool AsiIsQueue(ASI asi)
255 {
256 return asi == ASI_QUEUE;
257 }
258
260 bool AsiIsDtlb(ASI asi)
259 bool AsiIsMmu(ASI asi)
261 {
260 {
262 return
263 (asi == ASI_DTLB_DATA_IN_REG) ||
264 (asi == ASI_DTLB_DATA_ACCESS_REG) ||
265 (asi == ASI_DTLB_TAG_READ_REG);
261 return asi == ASI_MMU ||
262 (asi >= ASI_DMMU_CTXT_ZERO_TSB_BASE_PS0 &&
263 asi <= ASI_IMMU_CTXT_ZERO_CONFIG) ||
264 (asi >= ASI_DMMU_CTXT_NONZERO_TSB_BASE_PS0 &&
265 asi <= ASI_IMMU_CTXT_NONZERO_CONFIG) ||
266 (asi >= ASI_IMMU &&
267 asi <= ASI_IMMU_TSB_PS1_PTR_REG) ||
268 (asi >= ASI_ITLB_DATA_IN_REG &&
269 asi <= ASI_TLB_INVALIDATE_ALL);
266 }
267
270 }
271
268 bool AsiIsMmu(ASI asi)
272 bool AsiIsUnPriv(ASI asi)
269 {
273 {
270 return
271 (asi == ASI_MMU_CONTEXTID) ||
272 (asi == ASI_IMMU) ||
273 (asi == ASI_MMU_REAL) ||
274 (asi == ASI_MMU) ||
275 (asi == ASI_DMMU) ||
276 (asi == ASI_UMMU) ||
277 (asi == ASI_DMMU_DEMAP);
274 return asi >= 0x80;
278 }
275 }
276
277 bool AsiIsPriv(ASI asi)
278 {
279 return asi <= 0x2f;
280 }
281
282
283 bool AsiIsHPriv(ASI asi)
284 {
285 return asi >= 0x30 && asi <= 0x7f;
286 }
287
288 bool AsiIsReg(ASI asi)
289 {
290 return AsiIsMmu(asi) || AsiIsScratchPad(asi);
291 }
292
279}
293}