tlb.hh (11723:0596db108c53) tlb.hh (12406:86bde4a026b5)
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007 MIPS Technologies, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 97 unchanged lines hidden (view full) ---

106 static Fault checkCacheability(RequestPtr &req);
107
108 // Checkpointing
109 void serialize(CheckpointOut &cp) const override;
110 void unserialize(CheckpointIn &cp) override;
111
112 void regStats() override;
113
1/*
2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007 MIPS Technologies, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 97 unchanged lines hidden (view full) ---

106 static Fault checkCacheability(RequestPtr &req);
107
108 // Checkpointing
109 void serialize(CheckpointOut &cp) const override;
110 void unserialize(CheckpointIn &cp) override;
111
112 void regStats() override;
113
114 Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode);
115 void translateTiming(RequestPtr req, ThreadContext *tc,
116 Translation *translation, Mode mode);
114 Fault translateAtomic(
115 RequestPtr req, ThreadContext *tc, Mode mode) override;
116 void translateTiming(
117 RequestPtr req, ThreadContext *tc,
118 Translation *translation, Mode mode) override;
119 Fault finalizePhysical(
120 RequestPtr req, ThreadContext *tc, Mode mode) const override;
117
121
118 /** Function stub for CheckerCPU compilation issues. RISC-V does not
119 * support the Checker model at the moment.
120 */
121 Fault translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode);
122 Fault finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const;
123
124 private:
125 Fault translateInst(RequestPtr req, ThreadContext *tc);
126 Fault translateData(RequestPtr req, ThreadContext *tc, bool write);
127};
128
129}
130
131
132
133#endif // __RISCV_MEMORY_HH__
122 private:
123 Fault translateInst(RequestPtr req, ThreadContext *tc);
124 Fault translateData(RequestPtr req, ThreadContext *tc, bool write);
125};
126
127}
128
129
130
131#endif // __RISCV_MEMORY_HH__