tlb.cc (11962:43ce94c4d34c) | tlb.cc (12406:86bde4a026b5) |
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1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * Copyright (c) 2007 MIPS Technologies, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 327 unchanged lines hidden (view full) --- 336TLB::translateTiming(RequestPtr req, ThreadContext *tc, 337 Translation *translation, Mode mode) 338{ 339 assert(translation); 340 translation->finish(translateAtomic(req, tc, mode), req, tc, mode); 341} 342 343Fault | 1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * Copyright (c) 2007 MIPS Technologies, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 327 unchanged lines hidden (view full) --- 336TLB::translateTiming(RequestPtr req, ThreadContext *tc, 337 Translation *translation, Mode mode) 338{ 339 assert(translation); 340 translation->finish(translateAtomic(req, tc, mode), req, tc, mode); 341} 342 343Fault |
344TLB::translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode) 345{ 346 panic("Not implemented\n"); 347 return NoFault; 348} 349 350Fault | |
351TLB::finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const 352{ 353 return NoFault; 354} 355 356 357RiscvISA::PTE & 358TLB::index(bool advance) --- 14 unchanged lines hidden --- | 344TLB::finalizePhysical(RequestPtr req, ThreadContext *tc, Mode mode) const 345{ 346 return NoFault; 347} 348 349 350RiscvISA::PTE & 351TLB::index(bool advance) --- 14 unchanged lines hidden --- |