system.hh (11723:0596db108c53) system.hh (12808:f275fd1244ce)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007 MIPS Technologies, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 15 unchanged lines hidden (view full) ---

24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Ali Saidi
30 * Nathan Binkert
31 * Jaidev Patwardhan
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007 MIPS Technologies, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 15 unchanged lines hidden (view full) ---

24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Ali Saidi
30 * Nathan Binkert
31 * Jaidev Patwardhan
32 * Robert Scheffel
32 */
33
34#ifndef __ARCH_RISCV_SYSTEM_HH__
35#define __ARCH_RISCV_SYSTEM_HH__
36
37#include <string>
38#include <vector>
39
40#include "base/loader/hex_file.hh"
41#include "base/loader/symtab.hh"
42#include "cpu/pc_event.hh"
43#include "kern/system_events.hh"
44#include "params/RiscvSystem.hh"
45#include "sim/sim_object.hh"
46#include "sim/system.hh"
47
48class RiscvSystem : public System
49{
33 */
34
35#ifndef __ARCH_RISCV_SYSTEM_HH__
36#define __ARCH_RISCV_SYSTEM_HH__
37
38#include <string>
39#include <vector>
40
41#include "base/loader/hex_file.hh"
42#include "base/loader/symtab.hh"
43#include "cpu/pc_event.hh"
44#include "kern/system_events.hh"
45#include "params/RiscvSystem.hh"
46#include "sim/sim_object.hh"
47#include "sim/system.hh"
48
49class RiscvSystem : public System
50{
51 protected:
52 // checker for bare metal application
53 bool _isBareMetal;
54 // entry point for simulation
55 Addr _resetVect;
56
50 public:
51 typedef RiscvSystemParams Params;
52 RiscvSystem(Params *p);
53 ~RiscvSystem();
54
57 public:
58 typedef RiscvSystemParams Params;
59 RiscvSystem(Params *p);
60 ~RiscvSystem();
61
62 // return reset vector
63 Addr resetVect() const { return _resetVect; }
64
65 // return bare metal checker
66 bool isBareMetal() const { return _isBareMetal; }
67
55 virtual bool breakpoint();
56
57 public:
58
59 /**
60 * Set the m5RiscvAccess pointer in the console
61 */
62 void setRiscvAccess(Addr access);

--- 32 unchanged lines hidden --- 		68 virtual bool breakpoint();
69
70 public:
71
72 /**
73 * Set the m5RiscvAccess pointer in the console
74 */
75 void setRiscvAccess(Addr access);

--- 32 unchanged lines hidden ---