system.hh (11723:0596db108c53) system.hh (12808:f275fd1244ce)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007 MIPS Technologies, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Ali Saidi
30 * Nathan Binkert
31 * Jaidev Patwardhan
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007 MIPS Technologies, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Ali Saidi
30 * Nathan Binkert
31 * Jaidev Patwardhan
32 * Robert Scheffel
32 */
33
34#ifndef __ARCH_RISCV_SYSTEM_HH__
35#define __ARCH_RISCV_SYSTEM_HH__
36
37#include <string>
38#include <vector>
39
40#include "base/loader/hex_file.hh"
41#include "base/loader/symtab.hh"
42#include "cpu/pc_event.hh"
43#include "kern/system_events.hh"
44#include "params/RiscvSystem.hh"
45#include "sim/sim_object.hh"
46#include "sim/system.hh"
47
48class RiscvSystem : public System
49{
33 */
34
35#ifndef __ARCH_RISCV_SYSTEM_HH__
36#define __ARCH_RISCV_SYSTEM_HH__
37
38#include <string>
39#include <vector>
40
41#include "base/loader/hex_file.hh"
42#include "base/loader/symtab.hh"
43#include "cpu/pc_event.hh"
44#include "kern/system_events.hh"
45#include "params/RiscvSystem.hh"
46#include "sim/sim_object.hh"
47#include "sim/system.hh"
48
49class RiscvSystem : public System
50{
51 protected:
52 // checker for bare metal application
53 bool _isBareMetal;
54 // entry point for simulation
55 Addr _resetVect;
56
50 public:
51 typedef RiscvSystemParams Params;
52 RiscvSystem(Params *p);
53 ~RiscvSystem();
54
57 public:
58 typedef RiscvSystemParams Params;
59 RiscvSystem(Params *p);
60 ~RiscvSystem();
61
62 // return reset vector
63 Addr resetVect() const { return _resetVect; }
64
65 // return bare metal checker
66 bool isBareMetal() const { return _isBareMetal; }
67
55 virtual bool breakpoint();
56
57 public:
58
59 /**
60 * Set the m5RiscvAccess pointer in the console
61 */
62 void setRiscvAccess(Addr access);
63
64 /** console symbol table */
65 SymbolTable *consoleSymtab;
66
67 /** Object pointer for the console code */
68 ObjectFile *console;
69
70 /** Used by some Bare Iron Configurations */
71 HexFile *hexFile;
72
73#ifndef NDEBUG
74 /** Event to halt the simulator if the console calls panic() */
75 BreakPCEvent *consolePanicEvent;
76#endif
77
78 protected:
79 const Params *params() const { return (const Params *)_params; }
80
81 /** Add a function-based event to the console code. */
82 template <class T>
83 T *
84 addConsoleFuncEvent(const char *lbl)
85 {
86 return addFuncEvent<T>(consoleSymtab, lbl);
87 }
88
89 virtual Addr fixFuncEventAddr(Addr addr);
90
91};
92
93#endif
94
68 virtual bool breakpoint();
69
70 public:
71
72 /**
73 * Set the m5RiscvAccess pointer in the console
74 */
75 void setRiscvAccess(Addr access);
76
77 /** console symbol table */
78 SymbolTable *consoleSymtab;
79
80 /** Object pointer for the console code */
81 ObjectFile *console;
82
83 /** Used by some Bare Iron Configurations */
84 HexFile *hexFile;
85
86#ifndef NDEBUG
87 /** Event to halt the simulator if the console calls panic() */
88 BreakPCEvent *consolePanicEvent;
89#endif
90
91 protected:
92 const Params *params() const { return (const Params *)_params; }
93
94 /** Add a function-based event to the console code. */
95 template <class T>
96 T *
97 addConsoleFuncEvent(const char *lbl)
98 {
99 return addFuncEvent<T>(consoleSymtab, lbl);
100 }
101
102 virtual Addr fixFuncEventAddr(Addr addr);
103
104};
105
106#endif
107