1/* 2 * Copyright (c) 2017 The University of Virginia 3 * Copyright 2015 LabWare 4 * Copyright 2014 Google, Inc. 5 * Copyright (c) 2007 The Regents of The University of Michigan 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 36 unchanged lines hidden (view full) --- 45class ThreadContext; 46 47namespace RiscvISA 48{ 49 50class RemoteGDB : public BaseRemoteGDB 51{ 52 protected: |
53 static const int NumGDBRegs = 4162; 54 static const int NumCSRs = 4096; |
55 56 bool acc(Addr addr, size_t len); |
57 // A breakpoint will be 2 bytes if it is compressed and 4 if not 58 bool checkBpLen(size_t len) override { return len == 2 || len == 4; } |
59 60 class RiscvGdbRegCache : public BaseGdbRegCache 61 { 62 using BaseGdbRegCache::BaseGdbRegCache; 63 private: 64 struct { 65 uint64_t gpr[NumIntArchRegs]; 66 uint64_t pc; |
67 } r; |
68 public: 69 char *data() const { return (char *)&r; } 70 size_t size() const { return sizeof(r); } 71 void getRegs(ThreadContext*); 72 void setRegs(ThreadContext*) const; 73 74 const std::string 75 name() const --- 15 unchanged lines hidden --- |