registers.hh (13612:12ae022f3a30) | registers.hh (13622:ba31c2a23eca) |
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1/* 2 * Copyright (c) 2013 ARM Limited 3 * Copyright (c) 2014-2015 Sven Karlsson 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 50 unchanged lines hidden (view full) --- 59#include "base/types.hh" 60 61namespace RiscvISA { 62 63using RiscvISAInst::MaxInstSrcRegs; 64using RiscvISAInst::MaxInstDestRegs; 65const int MaxMiscDestRegs = 1; 66 | 1/* 2 * Copyright (c) 2013 ARM Limited 3 * Copyright (c) 2014-2015 Sven Karlsson 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 50 unchanged lines hidden (view full) --- 59#include "base/types.hh" 60 61namespace RiscvISA { 62 63using RiscvISAInst::MaxInstSrcRegs; 64using RiscvISAInst::MaxInstDestRegs; 65const int MaxMiscDestRegs = 1; 66 |
67typedef uint8_t CCReg; // Not applicable to Riscv 68 | |
69// Not applicable to RISC-V 70using VecElem = ::DummyVecElem; 71using VecReg = ::DummyVecReg; 72using ConstVecReg = ::DummyConstVecReg; 73using VecRegContainer = ::DummyVecRegContainer; 74constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg; 75constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes; 76 --- 653 unchanged lines hidden --- | 67// Not applicable to RISC-V 68using VecElem = ::DummyVecElem; 69using VecReg = ::DummyVecReg; 70using ConstVecReg = ::DummyConstVecReg; 71using VecRegContainer = ::DummyVecRegContainer; 72constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg; 73constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes; 74 --- 653 unchanged lines hidden --- |