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> #include "arch/generic/vec_pred_reg.hh"
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< // dummy typedefs since we don't have vector regs
< const unsigned NumVecElemPerVecReg = 2;
< using VecElem = uint32_t;
< using VecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, false>;
< using ConstVecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, true>;
< using VecRegContainer = VecReg::Container;
---
> // Not applicable to RISC-V
> using VecElem = ::DummyVecElem;
> using VecReg = ::DummyVecReg;
> using ConstVecReg = ::DummyConstVecReg;
> using VecRegContainer = ::DummyVecRegContainer;
> constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg;
> constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes;
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> // Not applicable to RISC-V
> using VecPredReg = ::DummyVecPredReg;
> using ConstVecPredReg = ::DummyConstVecPredReg;
> using VecPredRegContainer = ::DummyVecPredRegContainer;
> constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits;
> constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr;
>
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< // This has to be one to prevent warnings that are treated as errors
< const unsigned NumVecRegs = 1;
---
>
> const unsigned NumVecRegs = 1; // Not applicable to RISC-V
> // (1 to prevent warnings)
> const int NumVecPredRegs = 1; // Not applicable to RISC-V
> // (1 to prevent warnings)
>