1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * Copyright (c) 2017 The University of Virginia
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 34 unchanged lines hidden (view full) ---

43class ObjectFile;
44class System;
45
46class RiscvProcess : public Process
47{
48 protected:
49 RiscvProcess(ProcessParams * params, ObjectFile *objFile);
50
51 void initState();
52
53 template<class IntType>
54 void argsInit(int pageSize);
55
56 public:
57 RiscvISA::IntReg getSyscallArg(ThreadContext *tc, int &i);
58 /// Explicitly import the otherwise hidden getSyscallArg
59 using Process::getSyscallArg;
60 void setSyscallArg(ThreadContext *tc, int i, RiscvISA::IntReg val);
61 void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value);
62
63 virtual bool mmapGrowsDown() const override { return false; }
64};
65
66/* No architectural page table defined for this ISA */
67typedef NoArchPageTable ArchPageTable;
68
69
70#endif // __RISCV_PROCESS_HH__