process.cc (12393:116dd3ac3d33) process.cc (12394:7c5a2e374998)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * Copyright (c) 2016 The University of Virginia
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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31 * Korey Sewell
32 * Alec Roelke
33 */
34#include "arch/riscv/process.hh"
35
36#include <algorithm>
37#include <cstddef>
38#include <iostream>
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * Copyright (c) 2016 The University of Virginia
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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31 * Korey Sewell
32 * Alec Roelke
33 */
34#include "arch/riscv/process.hh"
35
36#include <algorithm>
37#include <cstddef>
38#include <iostream>
39#include <iterator>
39#include <map>
40#include <string>
41#include <vector>
42
43#include "arch/riscv/isa_traits.hh"
44#include "base/loader/elf_object.hh"
45#include "base/loader/object_file.hh"
46#include "base/logging.hh"
40#include <map>
41#include <string>
42#include <vector>
43
44#include "arch/riscv/isa_traits.hh"
45#include "base/loader/elf_object.hh"
46#include "base/loader/object_file.hh"
47#include "base/logging.hh"
48#include "base/random.hh"
47#include "cpu/thread_context.hh"
48#include "debug/Stack.hh"
49#include "mem/page_table.hh"
50#include "params/Process.hh"
51#include "sim/aux_vector.hh"
52#include "sim/process.hh"
53#include "sim/process_impl.hh"
54#include "sim/syscall_return.hh"

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76 Process::initState();
77
78 argsInit<uint64_t>(PageBytes);
79}
80
81template<class IntType> void
82RiscvProcess::argsInit(int pageSize)
83{
49#include "cpu/thread_context.hh"
50#include "debug/Stack.hh"
51#include "mem/page_table.hh"
52#include "params/Process.hh"
53#include "sim/aux_vector.hh"
54#include "sim/process.hh"
55#include "sim/process_impl.hh"
56#include "sim/syscall_return.hh"

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78 Process::initState();
79
80 argsInit<uint64_t>(PageBytes);
81}
82
83template<class IntType> void
84RiscvProcess::argsInit(int pageSize)
85{
86 const int RandomBytes = 16;
87
84 updateBias();
85 objFile->loadSections(initVirtMem);
86 ElfObject* elfObject = dynamic_cast<ElfObject*>(objFile);
87 memState->setStackMin(memState->getStackBase());
88
89 // Determine stack size and populate auxv
90 Addr stack_top = memState->getStackMin();
88 updateBias();
89 objFile->loadSections(initVirtMem);
90 ElfObject* elfObject = dynamic_cast<ElfObject*>(objFile);
91 memState->setStackMin(memState->getStackBase());
92
93 // Determine stack size and populate auxv
94 Addr stack_top = memState->getStackMin();
91 stack_top -= elfObject->programHeaderSize();
95 stack_top -= RandomBytes;
92 for (const string& arg: argv)
93 stack_top -= arg.size() + 1;
94 for (const string& env: envp)
95 stack_top -= env.size() + 1;
96 stack_top &= -sizeof(Addr);
97
98 vector<AuxVector<IntType>> auxv;
99 if (elfObject != nullptr) {

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109 stack_top -= (1 + argv.size()) * sizeof(Addr) +
110 (1 + envp.size()) * sizeof(Addr) +
111 sizeof(Addr) + 2 * sizeof(IntType) * auxv.size();
112 stack_top &= -2*sizeof(Addr);
113 memState->setStackSize(memState->getStackBase() - stack_top);
114 allocateMem(roundDown(stack_top, pageSize),
115 roundUp(memState->getStackSize(), pageSize));
116
96 for (const string& arg: argv)
97 stack_top -= arg.size() + 1;
98 for (const string& env: envp)
99 stack_top -= env.size() + 1;
100 stack_top &= -sizeof(Addr);
101
102 vector<AuxVector<IntType>> auxv;
103 if (elfObject != nullptr) {

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113 stack_top -= (1 + argv.size()) * sizeof(Addr) +
114 (1 + envp.size()) * sizeof(Addr) +
115 sizeof(Addr) + 2 * sizeof(IntType) * auxv.size();
116 stack_top &= -2*sizeof(Addr);
117 memState->setStackSize(memState->getStackBase() - stack_top);
118 allocateMem(roundDown(stack_top, pageSize),
119 roundUp(memState->getStackSize(), pageSize));
120
117 // Copy program headers to stack
118 memState->setStackMin(memState->getStackMin() -
119 elfObject->programHeaderSize());
120 uint8_t* phdr = new uint8_t[elfObject->programHeaderSize()];
121 initVirtMem.readBlob(elfObject->programHeaderTable(), phdr,
122 elfObject->programHeaderSize());
123 initVirtMem.writeBlob(memState->getStackMin(), phdr,
124 elfObject->programHeaderSize());
125 delete phdr;
121 // Copy random bytes (for AT_RANDOM) to stack
122 memState->setStackMin(memState->getStackMin() - RandomBytes);
123 uint8_t at_random[RandomBytes];
124 generate(begin(at_random), end(at_random),
125 [&]{ return random_mt.random(0, 0xFF); });
126 initVirtMem.writeBlob(memState->getStackMin(), at_random, RandomBytes);
126
127 // Copy argv to stack
128 vector<Addr> argPointers;
129 for (const string& arg: argv) {
130 memState->setStackMin(memState->getStackMin() - (arg.size() + 1));
131 initVirtMem.writeString(memState->getStackMin(), arg.c_str());
132 argPointers.push_back(memState->getStackMin());
133 if (DTRACE(Stack)) {

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128 // Copy argv to stack
129 vector<Addr> argPointers;
130 for (const string& arg: argv) {
131 memState->setStackMin(memState->getStackMin() - (arg.size() + 1));
132 initVirtMem.writeString(memState->getStackMin(), arg.c_str());
133 argPointers.push_back(memState->getStackMin());
134 if (DTRACE(Stack)) {

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