standard.isa (12428:ddc6b7179c81) standard.isa (12482:35461496d012)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2015 RISC-V Foundation
4// Copyright (c) 2016-2017 The University of Virginia
5// All rights reserved.
6//
7// Redistribution and use in source and binary forms, with or without
8// modification, are permitted provided that the following conditions are

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38 //
39 // Static instruction class for "%(mnemonic)s".
40 //
41 class %(class_name)s : public %(base_class)s
42 {
43 public:
44 /// Constructor.
45 %(class_name)s(MachInst machInst);
1// -*- mode:c++ -*-
2
3// Copyright (c) 2015 RISC-V Foundation
4// Copyright (c) 2016-2017 The University of Virginia
5// All rights reserved.
6//
7// Redistribution and use in source and binary forms, with or without
8// modification, are permitted provided that the following conditions are

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38 //
39 // Static instruction class for "%(mnemonic)s".
40 //
41 class %(class_name)s : public %(base_class)s
42 {
43 public:
44 /// Constructor.
45 %(class_name)s(MachInst machInst);
46 Fault execute(ExecContext *, Trace::InstRecord *) const;
46 Fault execute(ExecContext *, Trace::InstRecord *) const override;
47 std::string generateDisassembly(Addr pc,
48 const SymbolTable *symtab) const override;
49 };
50}};
51
52def template ImmConstructor {{
53 %(class_name)s::%(class_name)s(MachInst machInst)
54 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)

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94 //
95 // Static instruction class for "%(mnemonic)s".
96 //
97 class %(class_name)s : public %(base_class)s
98 {
99 public:
100 /// Constructor.
101 %(class_name)s(MachInst machInst);
47 std::string generateDisassembly(Addr pc,
48 const SymbolTable *symtab) const override;
49 };
50}};
51
52def template ImmConstructor {{
53 %(class_name)s::%(class_name)s(MachInst machInst)
54 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)

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94 //
95 // Static instruction class for "%(mnemonic)s".
96 //
97 class %(class_name)s : public %(base_class)s
98 {
99 public:
100 /// Constructor.
101 %(class_name)s(MachInst machInst);
102 Fault execute(ExecContext *, Trace::InstRecord *) const;
102 Fault execute(ExecContext *, Trace::InstRecord *) const override;
103
104 std::string
105 generateDisassembly(Addr pc, const SymbolTable *symtab) const override;
106
107 RiscvISA::PCState
108 branchTarget(const RiscvISA::PCState &branchPC) const override;
109
110 using StaticInst::branchTarget;

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153 //
154 // Static instruction class for "%(mnemonic)s".
155 //
156 class %(class_name)s : public %(base_class)s
157 {
158 public:
159 /// Constructor.
160 %(class_name)s(MachInst machInst);
103
104 std::string
105 generateDisassembly(Addr pc, const SymbolTable *symtab) const override;
106
107 RiscvISA::PCState
108 branchTarget(const RiscvISA::PCState &branchPC) const override;
109
110 using StaticInst::branchTarget;

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153 //
154 // Static instruction class for "%(mnemonic)s".
155 //
156 class %(class_name)s : public %(base_class)s
157 {
158 public:
159 /// Constructor.
160 %(class_name)s(MachInst machInst);
161 Fault execute(ExecContext *, Trace::InstRecord *) const;
161 Fault execute(ExecContext *, Trace::InstRecord *) const override;
162
163 std::string
164 generateDisassembly(Addr pc, const SymbolTable *symtab) const override;
165
166 RiscvISA::PCState
167 branchTarget(ThreadContext *tc) const override;
168
169 using StaticInst::branchTarget;

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163 std::string
164 generateDisassembly(Addr pc, const SymbolTable *symtab) const override;
165
166 RiscvISA::PCState
167 branchTarget(ThreadContext *tc) const override;
168
169 using StaticInst::branchTarget;

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