1// -*- mode:c++ -*- 2 3// Copyright (c) 2015 RISC-V Foundation 4// Copyright (c) 2016-2017 The University of Virginia 5// All rights reserved. 6// 7// Redistribution and use in source and binary forms, with or without 8// modification, are permitted provided that the following conditions are --- 19 unchanged lines hidden (view full) --- 28// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29// 30// Authors: Alec Roelke 31 32//////////////////////////////////////////////////////////////////// 33// 34// Integer instructions 35// |
36 |
37def template ImmDeclare {{ 38 // 39 // Static instruction class for "%(mnemonic)s". 40 // 41 class %(class_name)s : public %(base_class)s 42 { 43 public: 44 /// Constructor. --- 171 unchanged lines hidden (view full) --- 216 decoder_output = BasicConstructor.subst(iop) 217 decode_block = BasicDecode.subst(iop) 218 exec_output = BasicExecute.subst(iop) 219}}; 220 221def format IOp(code, *opt_flags) {{ 222 imm_code = 'imm = IMM12; if (IMMSIGN > 0) imm |= ~((uint64_t)0x7FF);' 223 regs = ['_destRegIdx[0]','_srcRegIdx[0]'] |
224 iop = InstObjParams(name, Name, 'ImmOp<int64_t>', |
225 {'code': code, 'imm_code': imm_code, 226 'regs': ','.join(regs)}, opt_flags) 227 header_output = ImmDeclare.subst(iop) 228 decoder_output = ImmConstructor.subst(iop) 229 decode_block = BasicDecode.subst(iop) 230 exec_output = ImmExecute.subst(iop) 231}}; 232 233def format BOp(code, *opt_flags) {{ 234 imm_code = """ 235 imm |= BIMM12BIT11 << 11; 236 imm |= BIMM12BITS4TO1 << 1; 237 imm |= BIMM12BITS10TO5 << 5; 238 if (IMMSIGN > 0) 239 imm |= ~((uint64_t)0xFFF); 240 """ 241 regs = ['_srcRegIdx[0]','_srcRegIdx[1]'] |
242 iop = InstObjParams(name, Name, 'ImmOp<int64_t>', |
243 {'code': code, 'imm_code': imm_code, 244 'regs': ','.join(regs)}, opt_flags) 245 header_output = BranchDeclare.subst(iop) 246 decoder_output = ImmConstructor.subst(iop) 247 decode_block = BasicDecode.subst(iop) 248 exec_output = BranchExecute.subst(iop) 249}}; 250 251def format Jump(code, *opt_flags) {{ 252 imm_code = 'imm = IMM12; if (IMMSIGN > 0) imm |= ~((uint64_t)0x7FF);' 253 regs = ['_destRegIdx[0]','_srcRegIdx[0]'] |
254 iop = InstObjParams(name, Name, 'ImmOp<int64_t>', |
255 {'code': code, 'imm_code': imm_code, 256 'regs': ','.join(regs)}, opt_flags) 257 header_output = JumpDeclare.subst(iop) 258 decoder_output = ImmConstructor.subst(iop) 259 decode_block = BasicDecode.subst(iop) 260 exec_output = JumpExecute.subst(iop) 261}}; 262 263def format UOp(code, *opt_flags) {{ 264 imm_code = 'imm = (int32_t)(IMM20 << 12);' 265 regs = ['_destRegIdx[0]'] |
266 iop = InstObjParams(name, Name, 'ImmOp<int64_t>', |
267 {'code': code, 'imm_code': imm_code, 268 'regs': ','.join(regs)}, opt_flags) 269 header_output = ImmDeclare.subst(iop) 270 decoder_output = ImmConstructor.subst(iop) 271 decode_block = BasicDecode.subst(iop) 272 exec_output = ImmExecute.subst(iop) 273}}; 274 275def format JOp(code, *opt_flags) {{ 276 imm_code = """ 277 imm |= UJIMMBITS19TO12 << 12; 278 imm |= UJIMMBIT11 << 11; 279 imm |= UJIMMBITS10TO1 << 1; 280 if (IMMSIGN > 0) 281 imm |= ~((uint64_t)0xFFFFF); 282 """ 283 pc = 'pc.set(pc.pc() + imm);' 284 regs = ['_destRegIdx[0]'] |
285 iop = InstObjParams(name, Name, 'ImmOp<int64_t>', |
286 {'code': code, 'imm_code': imm_code, 287 'regs': ','.join(regs)}, opt_flags) 288 header_output = BranchDeclare.subst(iop) 289 decoder_output = ImmConstructor.subst(iop) 290 decode_block = BasicDecode.subst(iop) 291 exec_output = BranchExecute.subst(iop) 292}}; 293 --- 15 unchanged lines hidden --- |