49,53c49,50
< : RiscvStaticInst(mnem, _machInst, __opClass), ldisp(IMM12)
< {
< if (IMMSIGN > 0)
< ldisp |= ~((uint64_t)0xFFF);
< }
---
> : RiscvStaticInst(mnem, _machInst, __opClass), ldisp(0)
> {}
71c68
< : RiscvStaticInst(mnem, _machInst, __opClass), sdisp(IMM5)
---
> : RiscvStaticInst(mnem, _machInst, __opClass), sdisp(0)
73c70
< sdisp |= IMM7 << 5;
---
> sdisp = IMM5 | (IMM7 << 5);
145a143
> %(offset_code)s;
171,172c169,170
< def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
< base_class, postacc_code='', decode_template=BasicDecode,
---
> def LoadStoreBase(name, Name, offset_code, ea_code, memacc_code, mem_flags,
> inst_flags, base_class, postacc_code='', decode_template=BasicDecode,
176c174
< inst_flags = makeList(inst_flags) # + ['IsNonSpeculative']
---
> inst_flags = makeList(inst_flags)
179,180c177,179
< { 'ea_code':ea_code, 'memacc_code':memacc_code,
< 'postacc_code':postacc_code }, inst_flags)
---
> {'offset_code': offset_code, 'ea_code': ea_code,
> 'memacc_code': memacc_code, 'postacc_code': postacc_code },
> inst_flags)
344a344,348
> offset_code = """
> ldisp = IMM12;
> if (IMMSIGN > 0)
> ldisp |= ~((uint64_t)0xFFF);
> """
346,347c350,351
< LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
< 'Load', exec_template_base='Load')
---
> LoadStoreBase(name, Name, offset_code, ea_code, memacc_code, mem_flags,
> inst_flags, 'Load', exec_template_base='Load')
351a356,360
> offset_code = """
> sdisp = IMM5 | (IMM7 << 5);
> if (IMMSIGN > 0)
> sdisp |= ~((uint64_t)0xFFF);
> """
353,354c362,363
< LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
< 'Store', exec_template_base='Store')
---
> LoadStoreBase(name, Name, offset_code, ea_code, memacc_code, mem_flags,
> inst_flags, 'Store', exec_template_base='Store')