mem.isa (12385:288c62455dde) | mem.isa (12482:35461496d012) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2015 RISC-V Foundation 4// Copyright (c) 2016 The University of Virginia 5// All rights reserved. 6// 7// Redistribution and use in source and binary forms, with or without 8// modification, are permitted provided that the following conditions are --- 29 unchanged lines hidden (view full) --- 38 * Static instruction class for "%(mnemonic)s". 39 */ 40 class %(class_name)s : public %(base_class)s 41 { 42 public: 43 /// Constructor. 44 %(class_name)s(ExtMachInst machInst); 45 | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2015 RISC-V Foundation 4// Copyright (c) 2016 The University of Virginia 5// All rights reserved. 6// 7// Redistribution and use in source and binary forms, with or without 8// modification, are permitted provided that the following conditions are --- 29 unchanged lines hidden (view full) --- 38 * Static instruction class for "%(mnemonic)s". 39 */ 40 class %(class_name)s : public %(base_class)s 41 { 42 public: 43 /// Constructor. 44 %(class_name)s(ExtMachInst machInst); 45 |
46 Fault execute(ExecContext *, Trace::InstRecord *) const; 47 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const; 48 Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const; | 46 Fault execute(ExecContext *, Trace::InstRecord *) const override; 47 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const override; 48 Fault completeAcc(PacketPtr, ExecContext *, 49 Trace::InstRecord *) const override; |
49 }; 50}}; 51 52 53def template LoadStoreConstructor {{ 54 %(class_name)s::%(class_name)s(ExtMachInst machInst): 55 %(base_class)s("%(mnemonic)s", machInst, %(op_class)s) 56 { --- 193 unchanged lines hidden --- | 50 }; 51}}; 52 53 54def template LoadStoreConstructor {{ 55 %(class_name)s::%(class_name)s(ExtMachInst machInst): 56 %(base_class)s("%(mnemonic)s", machInst, %(op_class)s) 57 { --- 193 unchanged lines hidden --- |