1// -*- mode:c++ -*-
2
3// Copyright (c) 2015 RISC-V Foundation
4// Copyright (c) 2016 The University of Virginia
5// All rights reserved.
6//
7// Redistribution and use in source and binary forms, with or without
8// modification, are permitted provided that the following conditions are

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181
182 if mem_flags:
183 mem_flags = [ 'Request::%s' % flag for flag in mem_flags ]
184 s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';'
185 iop.constructor += s
186
187 # select templates
188
189 fullExecTemplate = eval(exec_template_base + 'Execute')
190 initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
191 completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
192
193 # (header_output, decoder_output, decode_block, exec_output)
194 return (LoadStoreDeclare.subst(iop),
195 LoadStoreConstructor.subst(iop),
196 decode_template.subst(iop),

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335 Fault
336 %(class_name)s::completeAcc(PacketPtr pkt, CPU_EXEC_CONTEXT *xc,
337 Trace::InstRecord *traceData) const
338 {
339 return NoFault;
340 }
341}};
342
343def format Load(memacc_code, ea_code = {{EA = Rs1 + ldisp;}}, mem_flags=[],
344 inst_flags=[]) {{
345 (header_output, decoder_output, decode_block, exec_output) = \
346 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
347 'Load', exec_template_base='Load')
348}};
349
350def format Store(memacc_code, ea_code={{EA = Rs1 + sdisp;}}, mem_flags=[],
351 inst_flags=[]) {{
352 (header_output, decoder_output, decode_block, exec_output) = \
353 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
354 'Store', exec_template_base='Store')
355}};