compressed.isa (12428:ddc6b7179c81) | compressed.isa (12535:22fe7cd9a852) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2015 RISC-V Foundation 4// Copyright (c) 2017 The University of Virginia 5// All rights reserved. 6// 7// Redistribution and use in source and binary forms, with or without 8// modification, are permitted provided that the following conditions are --- 33 unchanged lines hidden (view full) --- 42 {'code': code, 'imm_code': imm_code, 43 'regs': ','.join(regs)}, opt_flags) 44 header_output = ImmDeclare.subst(iop) 45 decoder_output = ImmConstructor.subst(iop) 46 decode_block = BasicDecode.subst(iop) 47 exec_output = ImmExecute.subst(iop) 48}}; 49 | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2015 RISC-V Foundation 4// Copyright (c) 2017 The University of Virginia 5// All rights reserved. 6// 7// Redistribution and use in source and binary forms, with or without 8// modification, are permitted provided that the following conditions are --- 33 unchanged lines hidden (view full) --- 42 {'code': code, 'imm_code': imm_code, 43 'regs': ','.join(regs)}, opt_flags) 44 header_output = ImmDeclare.subst(iop) 45 decoder_output = ImmConstructor.subst(iop) 46 decode_block = BasicDecode.subst(iop) 47 exec_output = ImmExecute.subst(iop) 48}}; 49 |
50def format CBOp(code, *opt_flags) {{ 51 imm_code = """ 52 imm = CIMM5<2:1> << 1 | 53 CIMM3<1:0> << 3 | 54 CIMM5<0:0> << 5 | 55 CIMM5<4:3> << 6; 56 if (CIMM3<2:2> > 0) 57 imm |= ~((int64_t)0xFF); 58 """ 59 regs = ['_srcRegIdx[0]','_srcRegIdx[1]'] 60 iop = InstObjParams(name, Name, 'ImmOp<int64_t>', 61 {'code': code, 'imm_code': imm_code, 62 'regs': ','.join(regs)}, opt_flags) 63 header_output = BranchDeclare.subst(iop) 64 decoder_output = ImmConstructor.subst(iop) 65 decode_block = BasicDecode.subst(iop) 66 exec_output = BranchExecute.subst(iop) 67}}; 68 |
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50def format CompressedLoad(ldisp_code, memacc_code, 51 ea_code, mem_flags=[], inst_flags=[]) {{ 52 (header_output, decoder_output, decode_block, exec_output) = \ 53 LoadStoreBase(name, Name, ldisp_code, ea_code, memacc_code, mem_flags, 54 inst_flags, 'Load', exec_template_base='Load') 55}}; 56 57def format CompressedStore(sdisp_code, memacc_code, 58 ea_code, mem_flags=[], inst_flags=[]) {{ 59 (header_output, decoder_output, decode_block, exec_output) = \ 60 LoadStoreBase(name, Name, sdisp_code, ea_code, memacc_code, mem_flags, 61 inst_flags, 'Store', exec_template_base='Store') 62}}; | 69def format CompressedLoad(ldisp_code, memacc_code, 70 ea_code, mem_flags=[], inst_flags=[]) {{ 71 (header_output, decoder_output, decode_block, exec_output) = \ 72 LoadStoreBase(name, Name, ldisp_code, ea_code, memacc_code, mem_flags, 73 inst_flags, 'Load', exec_template_base='Load') 74}}; 75 76def format CompressedStore(sdisp_code, memacc_code, 77 ea_code, mem_flags=[], inst_flags=[]) {{ 78 (header_output, decoder_output, decode_block, exec_output) = \ 79 LoadStoreBase(name, Name, sdisp_code, ea_code, memacc_code, mem_flags, 80 inst_flags, 'Store', exec_template_base='Store') 81}}; |