36,132d35
< output header {{
< class LoadReserved : public RiscvStaticInst
< {
< protected:
< Request::Flags memAccessFlags;
<
< LoadReserved(const char *mnem, ExtMachInst _machInst,
< OpClass __opClass)
< : RiscvStaticInst(mnem, _machInst, __opClass)
< {}
<
< std::string
< generateDisassembly(Addr pc, const SymbolTable *symtab) const;
< };
<
< class StoreCond : public RiscvStaticInst
< {
< protected:
< Request::Flags memAccessFlags;
<
< StoreCond(const char* mnem, ExtMachInst _machInst, OpClass __opClass)
< : RiscvStaticInst(mnem, _machInst, __opClass)
< {}
<
< std::string
< generateDisassembly(Addr pc, const SymbolTable *symtab) const;
< };
<
< class AtomicMemOp : public RiscvMacroInst
< {
< protected:
< /// Constructor
< // Each AtomicMemOp has a load and a store phase
< AtomicMemOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
< : RiscvMacroInst(mnem, _machInst, __opClass)
< {}
<
< std::string generateDisassembly(Addr pc,
< const SymbolTable *symtab) const;
< };
<
< class AtomicMemOpMicro : public RiscvMicroInst
< {
< protected:
< /// Memory request flags. See mem/request.hh.
< Request::Flags memAccessFlags;
<
< /// Constructor
< AtomicMemOpMicro(const char *mnem, ExtMachInst _machInst,
< OpClass __opClass)
< : RiscvMicroInst(mnem, _machInst, __opClass)
< {}
<
< std::string generateDisassembly(Addr pc,
< const SymbolTable *symtab) const;
< };
< }};
<
< output decoder {{
< std::string LoadReserved::generateDisassembly(Addr pc,
< const SymbolTable *symtab) const
< {
< std::stringstream ss;
< ss << mnemonic << ' ' << registerName(_destRegIdx[0]) << ", ("
< << registerName(_srcRegIdx[0]) << ')';
< return ss.str();
< }
<
< std::string StoreCond::generateDisassembly(Addr pc,
< const SymbolTable *symtab) const
< {
< std::stringstream ss;
< ss << mnemonic << ' ' << registerName(_destRegIdx[0]) << ", "
< << registerName(_srcRegIdx[1]) << ", ("
< << registerName(_srcRegIdx[0]) << ')';
< return ss.str();
< }
<
< std::string AtomicMemOp::generateDisassembly(Addr pc,
< const SymbolTable *symtab) const
< {
< std::stringstream ss;
< ss << mnemonic << ' ' << registerName(_destRegIdx[0]) << ", "
< << registerName(_srcRegIdx[1]) << ", ("
< << registerName(_srcRegIdx[0]) << ')';
< return ss.str();
< }
<
< std::string AtomicMemOpMicro::generateDisassembly(Addr pc,
< const SymbolTable *symtab) const
< {
< std::stringstream ss;
< ss << csprintf("0x%08x", machInst) << ' ' << mnemonic;
< return ss.str();
< }
< }};
<