1// -*- mode:c++ -*-
2
3// Copyright (c) 2015 Riscv Developers
4// Copyright (c) 2016 The University of Virginia
5// All rights reserved.
6//
7// Redistribution and use in source and binary forms, with or without
8// modification, are permitted provided that the following conditions are

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47
48 class %(class_name)sLoad : public %(base_class)sMicro
49 {
50 public:
51 // Constructor
52 %(class_name)sLoad(ExtMachInst machInst, %(class_name)s *_p);
53
54 Fault execute(ExecContext *, Trace::InstRecord *) const;
55 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
56 Fault completeAcc(PacketPtr, ExecContext *,
57 Trace::InstRecord *) const;
58 };
59
60 class %(class_name)sStore : public %(base_class)sMicro
61 {
62 public:
63 // Constructor
64 %(class_name)sStore(ExtMachInst machInst, %(class_name)s *_p);
65
66 Fault execute(ExecContext *, Trace::InstRecord *) const;
67 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
68 Fault completeAcc(PacketPtr, ExecContext *,
69 Trace::InstRecord *) const;
70 };
71 };
72}};
73
74def template LRSCConstructor {{

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205 if (fault == NoFault) {
206 %(op_wb)s;
207 }
208
209 return fault;
210 }
211}};
212
213def template AtomicMemOpLoadInitiateAcc {{
214 Fault %(class_name)s::%(class_name)sLoad::initiateAcc(ExecContext *xc,
215 Trace::InstRecord *traceData) const
216 {
217 Addr EA;
218 Fault fault = NoFault;
219
220 %(op_src_decl)s;

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321 'postacc_code': postacc_code}, inst_flags)
322 iop.constructor += '\n\tmemAccessFlags = memAccessFlags | ' + \
323 '|'.join(['Request::%s' % flag for flag in mem_flags]) + ';'
324
325 header_output = LoadStoreDeclare.subst(iop)
326 decoder_output = LRSCConstructor.subst(iop)
327 decode_block = BasicDecode.subst(iop)
328 exec_output = LoadExecute.subst(iop) \
329 + LoadInitiateAcc.subst(iop) \
330 + LoadCompleteAcc.subst(iop)
331}};
332
333def format StoreCond(memacc_code, postacc_code={{ }}, ea_code={{EA = Rs1;}},
334 mem_flags=[], inst_flags=[]) {{
335 mem_flags = makeList(mem_flags)
336 inst_flags = makeList(inst_flags)
337 iop = InstObjParams(name, Name, 'StoreCond',
338 {'ea_code': ea_code, 'memacc_code': memacc_code,
339 'postacc_code': postacc_code}, inst_flags)
340 iop.constructor += '\n\tmemAccessFlags = memAccessFlags | ' + \
341 '|'.join(['Request::%s' % flag for flag in mem_flags]) + ';'
342
343 header_output = LoadStoreDeclare.subst(iop)
344 decoder_output = LRSCConstructor.subst(iop)
345 decode_block = BasicDecode.subst(iop)
346 exec_output = StoreCondExecute.subst(iop) \
347 + StoreInitiateAcc.subst(iop) \
348 + StoreCondCompleteAcc.subst(iop)
349}};
350
351def format AtomicMemOp(load_code, store_code, ea_code, load_flags=[],
352 store_flags=[], inst_flags=[]) {{
353 macro_iop = InstObjParams(name, Name, 'AtomicMemOp', ea_code, inst_flags)
354 header_output = AtomicMemOpDeclare.subst(macro_iop)
355 decoder_output = AtomicMemOpMacroConstructor.subst(macro_iop)
356 decode_block = BasicDecode.subst(macro_iop)
357 exec_output = ''
358
359 load_inst_flags = makeList(inst_flags) + ["IsMemRef", "IsLoad"]
360 load_iop = InstObjParams(name, Name, 'AtomicMemOpMicro',
361 {'ea_code': ea_code, 'code': load_code, 'op_name': 'Load'},
362 load_inst_flags)
363 decoder_output += AtomicMemOpLoadConstructor.subst(load_iop)
364 exec_output += AtomicMemOpLoadExecute.subst(load_iop) \
365 + AtomicMemOpLoadInitiateAcc.subst(load_iop) \
366 + AtomicMemOpLoadCompleteAcc.subst(load_iop)
367
368 store_inst_flags = makeList(inst_flags) + ["IsMemRef", "IsStore"]
369 store_iop = InstObjParams(name, Name, 'AtomicMemOpMicro',
370 {'ea_code': ea_code, 'code': store_code, 'op_name': 'Store'},
371 store_inst_flags)
372 decoder_output += AtomicMemOpStoreConstructor.subst(store_iop)
373 exec_output += AtomicMemOpStoreExecute.subst(store_iop) \
374 + AtomicMemOpStoreInitiateAcc.subst(store_iop) \
375 + AtomicMemOpStoreCompleteAcc.subst(store_iop)
376}};