isa.hh (13610:5d5404ac6288) | isa.hh (13612:12ae022f3a30) |
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1/* 2 * Copyright (c) 2009 The Regents of The University of Michigan 3 * Copyright (c) 2009 The University of Edinburgh 4 * Copyright (c) 2014 Sven Karlsson 5 * Copyright (c) 2016 RISC-V Foundation 6 * Copyright (c) 2016 The University of Virginia 7 * All rights reserved. 8 * --- 51 unchanged lines hidden (view full) --- 60 PRV_U = 0, 61 PRV_S = 1, 62 PRV_M = 3 63}; 64 65class ISA : public SimObject 66{ 67 protected: | 1/* 2 * Copyright (c) 2009 The Regents of The University of Michigan 3 * Copyright (c) 2009 The University of Edinburgh 4 * Copyright (c) 2014 Sven Karlsson 5 * Copyright (c) 2016 RISC-V Foundation 6 * Copyright (c) 2016 The University of Virginia 7 * All rights reserved. 8 * --- 51 unchanged lines hidden (view full) --- 60 PRV_U = 0, 61 PRV_S = 1, 62 PRV_M = 3 63}; 64 65class ISA : public SimObject 66{ 67 protected: |
68 std::vector<MiscReg> miscRegFile; | 68 std::vector<RegVal> miscRegFile; |
69 70 bool hpmCounterEnabled(int counter) const; 71 72 public: 73 typedef RiscvISAParams Params; 74 75 void clear(); 76 | 69 70 bool hpmCounterEnabled(int counter) const; 71 72 public: 73 typedef RiscvISAParams Params; 74 75 void clear(); 76 |
77 MiscReg readMiscRegNoEffect(int misc_reg) const; 78 MiscReg readMiscReg(int misc_reg, ThreadContext *tc); 79 void setMiscRegNoEffect(int misc_reg, MiscReg val); 80 void setMiscReg(int misc_reg, MiscReg val, ThreadContext *tc); | 77 RegVal readMiscRegNoEffect(int misc_reg) const; 78 RegVal readMiscReg(int misc_reg, ThreadContext *tc); 79 void setMiscRegNoEffect(int misc_reg, RegVal val); 80 void setMiscReg(int misc_reg, RegVal val, ThreadContext *tc); |
81 82 RegId flattenRegId(const RegId ®Id) const { return regId; } 83 int flattenIntIndex(int reg) const { return reg; } 84 int flattenFloatIndex(int reg) const { return reg; } 85 int flattenVecIndex(int reg) const { return reg; } 86 int flattenVecElemIndex(int reg) const { return reg; } 87 int flattenVecPredIndex(int reg) const { return reg; } 88 int flattenCCIndex(int reg) const { return reg; } --- 15 unchanged lines hidden --- | 81 82 RegId flattenRegId(const RegId ®Id) const { return regId; } 83 int flattenIntIndex(int reg) const { return reg; } 84 int flattenFloatIndex(int reg) const { return reg; } 85 int flattenVecIndex(int reg) const { return reg; } 86 int flattenVecElemIndex(int reg) const { return reg; } 87 int flattenVecPredIndex(int reg) const { return reg; } 88 int flattenCCIndex(int reg) const { return reg; } --- 15 unchanged lines hidden --- |