1/* 2 * Copyright (c) 2015 RISC-V Foundation 3 * Copyright (c) 2016 The University of Virginia 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 42 unchanged lines hidden (view full) --- 51 protected: 52 using StaticInst::StaticInst; 53 54 virtual std::string 55 generateDisassembly(Addr pc, const SymbolTable *symtab) const = 0; 56 57 public: 58 void advancePC(PCState &pc) const { pc.advance(); } |
59 60 size_t 61 asBytes(void *buf, size_t size) override 62 { 63 return simpleAsBytes(buf, size, machInst); 64 } |
65}; 66 67/** 68 * Base class for all RISC-V Macroops 69 */ 70class RiscvMacroInst : public RiscvStaticInst 71{ 72 protected: --- 56 unchanged lines hidden --- |