1/*
2 * Copyright (c) 2015 RISC-V Foundation
3 * Copyright (c) 2016 The University of Virginia
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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46/**
47 * Base class for all RISC-V static instructions.
48 */
49class RiscvStaticInst : public StaticInst
50{
51 protected:
52 using StaticInst::StaticInst;
53
54 public:
55 void advancePC(PCState &pc) const override { pc.advance(); }
56
57 size_t
58 asBytes(void *buf, size_t size) override
59 {
60 return simpleAsBytes(buf, size, machInst);
61 }
62};
63

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112 protected:
113 RiscvMicroInst(const char *mnem, ExtMachInst _machInst,
114 OpClass __opClass) :
115 RiscvStaticInst(mnem, _machInst, __opClass)
116 {
117 flags[IsMicroop] = true;
118 }
119
120 void advancePC(PCState &pcState) const override;
121};
122
123}
124
125#endif // __ARCH_RISCV_STATIC_INST_HH__