1#include "arch/riscv/insts/static_inst.hh"
2
3#include "arch/riscv/types.hh"
4#include "cpu/static_inst.hh"
5
6namespace RiscvISA
7{
8
9void
10RiscvMicroInst::advancePC(PCState &pcState) const
11{
12 if (flags[IsLastMicroop]) {
13 pcState.uEnd();
14 } else {
15 pcState.uAdvance();
16 }
17}
18
19} // namespace RiscvISA
2
3#include "arch/riscv/types.hh"
4#include "cpu/static_inst.hh"
5
6namespace RiscvISA
7{
8
9void
10RiscvMicroInst::advancePC(PCState &pcState) const
11{
12 if (flags[IsLastMicroop]) {
13 pcState.uEnd();
14 } else {
15 pcState.uAdvance();
16 }
17}
18
19} // namespace RiscvISA