faults.hh (11723:0596db108c53) faults.hh (11725:eb58f1bbeac8)
1/*
2 * Copyright (c) 2016 RISC-V Foundation
3 * Copyright (c) 2016 The University of Virginia
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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35#include <string>
36
37#include "cpu/thread_context.hh"
38#include "sim/faults.hh"
39
40namespace RiscvISA
41{
42
1/*
2 * Copyright (c) 2016 RISC-V Foundation
3 * Copyright (c) 2016 The University of Virginia
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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35#include <string>
36
37#include "cpu/thread_context.hh"
38#include "sim/faults.hh"
39
40namespace RiscvISA
41{
42
43const uint32_t FloatInexact = 1 << 0;
44const uint32_t FloatUnderflow = 1 << 1;
45const uint32_t FloatOverflow = 1 << 2;
46const uint32_t FloatDivZero = 1 << 3;
47const uint32_t FloatInvalid = 1 << 4;
48
43enum ExceptionCode {
44 INST_ADDR_MISALIGNED = 0,
45 INST_ACCESS = 1,
46 INST_ILLEGAL = 2,
47 BREAKPOINT = 3,
48 LOAD_ADDR_MISALIGNED = 4,
49 LOAD_ACCESS = 5,
50 STORE_ADDR_MISALIGNED = 6,

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119 : RiscvFault("Unimplemented instruction", INST_ILLEGAL, SOFTWARE),
120 instName(name)
121 {}
122
123 void
124 invoke_se(ThreadContext *tc, const StaticInstPtr &inst);
125};
126
49enum ExceptionCode {
50 INST_ADDR_MISALIGNED = 0,
51 INST_ACCESS = 1,
52 INST_ILLEGAL = 2,
53 BREAKPOINT = 3,
54 LOAD_ADDR_MISALIGNED = 4,
55 LOAD_ACCESS = 5,
56 STORE_ADDR_MISALIGNED = 6,

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125 : RiscvFault("Unimplemented instruction", INST_ILLEGAL, SOFTWARE),
126 instName(name)
127 {}
128
129 void
130 invoke_se(ThreadContext *tc, const StaticInstPtr &inst);
131};
132
133class IllegalFrmFault: public RiscvFault
134{
135 private:
136 const uint8_t frm;
137 public:
138 IllegalFrmFault(uint8_t r)
139 : RiscvFault("Illegal floating-point rounding mode", INST_ILLEGAL,
140 SOFTWARE),
141 frm(r)
142 {}
143
144 void invoke_se(ThreadContext *tc, const StaticInstPtr &inst);
145};
146
127class BreakpointFault : public RiscvFault
128{
129 public:
130 BreakpointFault() : RiscvFault("Breakpoint", BREAKPOINT, SOFTWARE)
131 {}
132
133 void
134 invoke_se(ThreadContext *tc, const StaticInstPtr &inst);

--- 17 unchanged lines hidden --- 		147class BreakpointFault : public RiscvFault
148{
149 public:
150 BreakpointFault() : RiscvFault("Breakpoint", BREAKPOINT, SOFTWARE)
151 {}
152
153 void
154 invoke_se(ThreadContext *tc, const StaticInstPtr &inst);

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