1/*
2 * Copyright (c) 2016 RISC-V Foundation
3 * Copyright (c) 2016 The University of Virginia
4 * Copyright (c) 2018 TU Dresden
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are
9 * met: redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer;
11 * redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the

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23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 *
30 * Authors: Alec Roelke
31 * Robert Scheffel
32 */
33
34#ifndef __ARCH_RISCV_FAULTS_HH__
35#define __ARCH_RISCV_FAULTS_HH__
36
37#include <string>
38
39#include "cpu/thread_context.hh"

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101
102 virtual void
103 invoke_se(ThreadContext *tc, const StaticInstPtr &inst);
104
105 void
106 invoke(ThreadContext *tc, const StaticInstPtr &inst);
107};
108
109class Reset : public FaultBase
110{
111
112 public:
113 Reset()
114 : _name("reset")
115 {}
116
117 FaultName
118 name() const override
119 {
120 return _name;
121 }
122
123 void
124 invoke(ThreadContext *tc, const StaticInstPtr &inst =
125 StaticInst::nullStaticInstPtr) override;
126
127 private:
128 const FaultName _name;
129};
130
131class UnknownInstFault : public RiscvFault
132{
133 public:
134 UnknownInstFault() : RiscvFault("Unknown instruction", INST_ILLEGAL,
135 SOFTWARE)
136 {}
137
138 void

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