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> #include "arch/riscv/registers.hh"
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< const uint32_t FloatInexact = 1 << 0;
< const uint32_t FloatUnderflow = 1 << 1;
< const uint32_t FloatOverflow = 1 << 2;
< const uint32_t FloatDivZero = 1 << 3;
< const uint32_t FloatInvalid = 1 << 4;
---
> enum FloatException : MiscReg {
> FloatInexact = 0x1,
> FloatUnderflow = 0x2,
> FloatOverflow = 0x4,
> FloatDivZero = 0x8,
> FloatInvalid = 0x10
> };
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< enum ExceptionCode {
---
> enum ExceptionCode : MiscReg {
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< ECALL_HYPER = 10,
< ECALL_MACH = 11
---
> ECALL_MACHINE = 11,
> INST_PAGE = 12,
> LOAD_PAGE = 13,
> STORE_PAGE = 15,
> AMO_PAGE = 15
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< enum InterruptCode {
< SOFTWARE,
< TIMER
< };
---
> /**
> * These fields are specified in the RISC-V Instruction Set Manual, Volume II,
> * v1.10, accessible at www.riscv.org. in Figure 3.7. The main register that
> * uses these fields is the MSTATUS register, which is shadowed by two others
> * accessible at lower privilege levels (SSTATUS and USTATUS) that can't see
> * the fields for higher privileges.
> */
> BitUnion64(STATUS)
> Bitfield<63> sd;
> Bitfield<35, 34> sxl;
> Bitfield<33, 32> uxl;
> Bitfield<22> tsr;
> Bitfield<21> tw;
> Bitfield<20> tvm;
> Bitfield<19> mxr;
> Bitfield<18> sum;
> Bitfield<17> mprv;
> Bitfield<16, 15> xs;
> Bitfield<14, 13> fs;
> Bitfield<12, 11> mpp;
> Bitfield<8> spp;
> Bitfield<7> mpie;
> Bitfield<5> spie;
> Bitfield<4> upie;
> Bitfield<3> mie;
> Bitfield<1> sie;
> Bitfield<0> uie;
> EndBitUnion(STATUS)
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> /**
> * These fields are specified in the RISC-V Instruction Set Manual, Volume II,
> * v1.10 in Figures 3.11 and 3.12, accessible at www.riscv.org. Both the MIP
> * and MIE registers have the same fields, so accesses to either should use
> * this bit union.
> */
> BitUnion64(INTERRUPT)
> Bitfield<11> mei;
> Bitfield<9> sei;
> Bitfield<8> uei;
> Bitfield<7> mti;
> Bitfield<5> sti;
> Bitfield<4> uti;
> Bitfield<3> msi;
> Bitfield<1> ssi;
> Bitfield<0> usi;
> EndBitUnion(INTERRUPT)
>
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> bool _interrupt;
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< const InterruptCode _int;
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< RiscvFault(FaultName n, ExceptionCode c, InterruptCode i)
< : _name(n), _code(c), _int(i)
---
> RiscvFault(FaultName n, bool i, ExceptionCode c)
> : _name(n), _interrupt(i), _code(c)
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< FaultName
< name() const
< {
< return _name;
< }
---
> FaultName name() const { return _name; }
> bool isInterrupt() const { return _interrupt; }
> ExceptionCode exception() const { return _code; }
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< ExceptionCode
< exception() const
< {
< return _code;
< }
<
< InterruptCode
< interrupt() const
< {
< return _int;
< }
<
< virtual void
< invoke_se(ThreadContext *tc, const StaticInstPtr &inst);
<
< void
< invoke(ThreadContext *tc, const StaticInstPtr &inst);
---
> virtual void invokeSE(ThreadContext *tc, const StaticInstPtr &inst);
> void invoke(ThreadContext *tc, const StaticInstPtr &inst) override;
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< UnknownInstFault() : RiscvFault("Unknown instruction", INST_ILLEGAL,
< SOFTWARE)
---
> UnknownInstFault() : RiscvFault("Unknown instruction", false, INST_ILLEGAL)
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< void
< invoke_se(ThreadContext *tc, const StaticInstPtr &inst);
---
> void invokeSE(ThreadContext *tc, const StaticInstPtr &inst) override;
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>
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< : RiscvFault("Illegal instruction", INST_ILLEGAL, SOFTWARE),
< reason(r)
---
> : RiscvFault("Illegal instruction", false, INST_ILLEGAL)
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< void invoke_se(ThreadContext *tc, const StaticInstPtr &inst);
---
> void invokeSE(ThreadContext *tc, const StaticInstPtr &inst) override;
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>
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< : RiscvFault("Unimplemented instruction", INST_ILLEGAL, SOFTWARE),
< instName(name)
---
> : RiscvFault("Unimplemented instruction", false, INST_ILLEGAL),
> instName(name)
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< void
< invoke_se(ThreadContext *tc, const StaticInstPtr &inst);
---
> void invokeSE(ThreadContext *tc, const StaticInstPtr &inst) override;
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>
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< : RiscvFault("Illegal floating-point rounding mode", INST_ILLEGAL,
< SOFTWARE),
< frm(r)
---
> : RiscvFault("Illegal floating-point rounding mode", false,
> INST_ILLEGAL),
> frm(r)
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< void invoke_se(ThreadContext *tc, const StaticInstPtr &inst);
---
> void invokeSE(ThreadContext *tc, const StaticInstPtr &inst) override;
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< BreakpointFault() : RiscvFault("Breakpoint", BREAKPOINT, SOFTWARE)
< {}
<
< void
< invoke_se(ThreadContext *tc, const StaticInstPtr &inst);
---
> BreakpointFault() : RiscvFault("Breakpoint", false, BREAKPOINT) {}
> void invokeSE(ThreadContext *tc, const StaticInstPtr &inst) override;
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< SyscallFault() : RiscvFault("System call", ECALL_USER, SOFTWARE)
< {}
<
< void
< invoke_se(ThreadContext *tc, const StaticInstPtr &inst);
---
> SyscallFault() : RiscvFault("System call", false, ECALL_USER) {}
> void invokeSE(ThreadContext *tc, const StaticInstPtr &inst) override;