utility.hh (7628:d9b98534a872) utility.hh (7680:f4eda002333b)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007-2008 The Florida State University
4 * Copyright (c) 2009 The University of Edinburgh
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are

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30 * Authors: Korey Sewell
31 * Stephen Hines
32 * Timothy M. Jones
33 */
34
35#ifndef __ARCH_POWER_UTILITY_HH__
36#define __ARCH_POWER_UTILITY_HH__
37
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007-2008 The Florida State University
4 * Copyright (c) 2009 The University of Edinburgh
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are

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30 * Authors: Korey Sewell
31 * Stephen Hines
32 * Timothy M. Jones
33 */
34
35#ifndef __ARCH_POWER_UTILITY_HH__
36#define __ARCH_POWER_UTILITY_HH__
37
38#include "arch/power/miscregs.hh"
39#include "arch/power/types.hh"
40#include "base/hashmap.hh"
41#include "base/types.hh"
42#include "cpu/thread_context.hh"
43
38#include "base/types.hh"
39#include "cpu/thread_context.hh"
40
44namespace __hash_namespace {
45
46template<>
47struct hash<PowerISA::ExtMachInst> : public hash<uint32_t> {
48 size_t operator()(const PowerISA::ExtMachInst &emi) const {
49 return hash<uint32_t>::operator()((uint32_t)emi);
50 };
51};
52
53} // __hash_namespace namespace
54
55namespace PowerISA {
56
57/**
58 * Function to ensure ISA semantics about 0 registers.
59 * @param tc The thread context.
60 */
61template <class TC>
62void zeroRegisters(TC *tc);

--- 18 unchanged lines hidden --- 		41namespace PowerISA {
42
43/**
44 * Function to ensure ISA semantics about 0 registers.
45 * @param tc The thread context.
46 */
47template <class TC>
48void zeroRegisters(TC *tc);

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