1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007-2008 The Florida State University
4 * Copyright (c) 2009 The University of Edinburgh
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are
9 * met: redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer;
11 * redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution;
14 * neither the name of the copyright holders nor the names of its
15 * contributors may be used to endorse or promote products derived from
16 * this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 *
30 * Authors: Korey Sewell
31 * Stephen Hines
32 * Timothy M. Jones
33 */
34
35#include "arch/power/utility.hh"
36#include "base/misc.hh"
37
38namespace PowerISA {
39
40void
41copyRegs(ThreadContext *src, ThreadContext *dest)
42{
43 // First loop through the integer registers.
44 for (int i = 0; i < NumIntRegs; ++i)
45 dest->setIntReg(i, src->readIntReg(i));
46
47 // Then loop through the floating point registers.
48 for (int i = 0; i < NumFloatRegs; ++i)
49 dest->setFloatRegBits(i, src->readFloatRegBits(i));
50
| 1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007-2008 The Florida State University
4 * Copyright (c) 2009 The University of Edinburgh
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are
9 * met: redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer;
11 * redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution;
14 * neither the name of the copyright holders nor the names of its
15 * contributors may be used to endorse or promote products derived from
16 * this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 *
30 * Authors: Korey Sewell
31 * Stephen Hines
32 * Timothy M. Jones
33 */
34
35#include "arch/power/utility.hh"
36#include "base/misc.hh"
37
38namespace PowerISA {
39
40void
41copyRegs(ThreadContext *src, ThreadContext *dest)
42{
43 // First loop through the integer registers.
44 for (int i = 0; i < NumIntRegs; ++i)
45 dest->setIntReg(i, src->readIntReg(i));
46
47 // Then loop through the floating point registers.
48 for (int i = 0; i < NumFloatRegs; ++i)
49 dest->setFloatRegBits(i, src->readFloatRegBits(i));
50
|
51 // Copy misc. registers
52 copyMiscRegs(src, dest);
53
54 // Lastly copy PC/NPC
55 dest->pcState(src->pcState());
56}
57
58uint64_t
59getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
60{
61 panic("getArgument not implemented for POWER.\n");
62 return 0;
63}
64
65void
66skipFunction(ThreadContext *tc)
67{
68 panic("Not Implemented for POWER");
69}
70
71void
72initCPU(ThreadContext *tc, int cpuId)
73{
74 panic("initCPU not implemented for POWER.\n");
75}
76
77
78} // namespace PowerISA
| 54 // Copy misc. registers
55 copyMiscRegs(src, dest);
56
57 // Lastly copy PC/NPC
58 dest->pcState(src->pcState());
59}
60
61uint64_t
62getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
63{
64 panic("getArgument not implemented for POWER.\n");
65 return 0;
66}
67
68void
69skipFunction(ThreadContext *tc)
70{
71 panic("Not Implemented for POWER");
72}
73
74void
75initCPU(ThreadContext *tc, int cpuId)
76{
77 panic("initCPU not implemented for POWER.\n");
78}
79
80
81} // namespace PowerISA
|