1/*
2 * Copyright (c) 2009 The University of Edinburgh
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Timothy M. Jones
29 */
30
31#ifndef __ARCH_POWER_TYPES_HH__
32#define __ARCH_POWER_TYPES_HH__
33
34#include "arch/generic/types.hh"
35#include "base/bitunion.hh"
| 1/*
2 * Copyright (c) 2009 The University of Edinburgh
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Timothy M. Jones
29 */
30
31#ifndef __ARCH_POWER_TYPES_HH__
32#define __ARCH_POWER_TYPES_HH__
33
34#include "arch/generic/types.hh"
35#include "base/bitunion.hh"
|
36#include "base/hashmap.hh"
| |
37#include "base/types.hh"
38
39namespace PowerISA
40{
41
42typedef uint32_t MachInst;
43
44BitUnion32(ExtMachInst)
45
46 // Registers
47 Bitfield<25, 21> rs;
48 Bitfield<20, 16> ra;
49
50 // Shifts and masks
51 Bitfield<15, 11> sh;
52 Bitfield<10, 6> mb;
53 Bitfield< 5, 1> me;
54
55 // Immediate fields
56 Bitfield<15, 0> si;
57 Bitfield<15, 0> d;
58
59 // Special purpose register identifier
60 Bitfield<20, 11> spr;
61 Bitfield<25, 2> li;
62 Bitfield<1> aa;
63 Bitfield<25, 23> bf;
64 Bitfield<15, 2> bd;
65 Bitfield<25, 21> bo;
66 Bitfield<20, 16> bi;
67 Bitfield<20, 18> bfa;
68
69 // Record bits
70 Bitfield<0> rc31;
71 Bitfield<10> oe;
72
73 // Condition register fields
74 Bitfield<25, 21> bt;
75 Bitfield<20, 16> ba;
76 Bitfield<15, 11> bb;
77
78 // FXM field for mtcrf instruction
79 Bitfield<19, 12> fxm;
80EndBitUnion(ExtMachInst)
81
82typedef GenericISA::SimplePCState<MachInst> PCState;
83
84// typedef uint64_t LargestRead;
85// // Need to use 64 bits to make sure that read requests get handled properly
86
87// typedef int RegContextParam;
88// typedef int RegContextVal;
89
90} // PowerISA namespace
91
| 36#include "base/types.hh"
37
38namespace PowerISA
39{
40
41typedef uint32_t MachInst;
42
43BitUnion32(ExtMachInst)
44
45 // Registers
46 Bitfield<25, 21> rs;
47 Bitfield<20, 16> ra;
48
49 // Shifts and masks
50 Bitfield<15, 11> sh;
51 Bitfield<10, 6> mb;
52 Bitfield< 5, 1> me;
53
54 // Immediate fields
55 Bitfield<15, 0> si;
56 Bitfield<15, 0> d;
57
58 // Special purpose register identifier
59 Bitfield<20, 11> spr;
60 Bitfield<25, 2> li;
61 Bitfield<1> aa;
62 Bitfield<25, 23> bf;
63 Bitfield<15, 2> bd;
64 Bitfield<25, 21> bo;
65 Bitfield<20, 16> bi;
66 Bitfield<20, 18> bfa;
67
68 // Record bits
69 Bitfield<0> rc31;
70 Bitfield<10> oe;
71
72 // Condition register fields
73 Bitfield<25, 21> bt;
74 Bitfield<20, 16> ba;
75 Bitfield<15, 11> bb;
76
77 // FXM field for mtcrf instruction
78 Bitfield<19, 12> fxm;
79EndBitUnion(ExtMachInst)
80
81typedef GenericISA::SimplePCState<MachInst> PCState;
82
83// typedef uint64_t LargestRead;
84// // Need to use 64 bits to make sure that read requests get handled properly
85
86// typedef int RegContextParam;
87// typedef int RegContextVal;
88
89} // PowerISA namespace
90
|
92__hash_namespace_begin
| 91namespace std {
|
93
94template<>
95struct hash<PowerISA::ExtMachInst> : public hash<uint32_t> {
96 size_t operator()(const PowerISA::ExtMachInst &emi) const {
97 return hash<uint32_t>::operator()((uint32_t)emi);
98 };
99};
100
| 92
93template<>
94struct hash<PowerISA::ExtMachInst> : public hash<uint32_t> {
95 size_t operator()(const PowerISA::ExtMachInst &emi) const {
96 return hash<uint32_t>::operator()((uint32_t)emi);
97 };
98};
99
|
101__hash_namespace_end
| 100}
|
102
103#endif // __ARCH_POWER_TYPES_HH__
| 101
102#endif // __ARCH_POWER_TYPES_HH__
|