1/*
2 * Copyright (c) 2009 The University of Edinburgh
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Timothy M. Jones
29 */
30
31#ifndef __ARCH_POWER_TYPES_HH__
32#define __ARCH_POWER_TYPES_HH__
33
34#include "base/bitunion.hh"
35#include "base/types.hh"
36
37namespace PowerISA
38{
39
40typedef uint32_t MachInst;
41
42BitUnion32(ExtMachInst)
43
44 // Registers
45 Bitfield<25, 21> rs;
46 Bitfield<20, 16> ra;
47
48 // Shifts and masks
49 Bitfield<15, 11> sh;
50 Bitfield<10, 6> mb;
51 Bitfield< 5, 1> me;
52
53 // Immediate fields
54 Bitfield<15, 0> si;
55 Bitfield<15, 0> d;
56
57 // Special purpose register identifier
58 Bitfield<20, 11> spr;
59 Bitfield<25, 2> li;
60 Bitfield<1> aa;
61 Bitfield<25, 23> bf;
62 Bitfield<15, 2> bd;
63 Bitfield<25, 21> bo;
64 Bitfield<20, 16> bi;
65 Bitfield<20, 18> bfa;
66
67 // Record bits
68 Bitfield<0> rc31;
69 Bitfield<10> oe;
70
71 // Condition register fields
72 Bitfield<25, 21> bt;
73 Bitfield<20, 16> ba;
74 Bitfield<15, 11> bb;
75
76 // FXM field for mtcrf instruction
77 Bitfield<19, 12> fxm;
78EndBitUnion(ExtMachInst)
79
80// typedef uint64_t LargestRead;
81// // Need to use 64 bits to make sure that read requests get handled properly
82
83// typedef int RegContextParam;
84// typedef int RegContextVal;
85
86struct CoreSpecific {
87};
88
89} // PowerISA namspace
90
91#endif // __ARCH_POWER_TYPES_HH__
2 * Copyright (c) 2009 The University of Edinburgh
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Timothy M. Jones
29 */
30
31#ifndef __ARCH_POWER_TYPES_HH__
32#define __ARCH_POWER_TYPES_HH__
33
34#include "base/bitunion.hh"
35#include "base/types.hh"
36
37namespace PowerISA
38{
39
40typedef uint32_t MachInst;
41
42BitUnion32(ExtMachInst)
43
44 // Registers
45 Bitfield<25, 21> rs;
46 Bitfield<20, 16> ra;
47
48 // Shifts and masks
49 Bitfield<15, 11> sh;
50 Bitfield<10, 6> mb;
51 Bitfield< 5, 1> me;
52
53 // Immediate fields
54 Bitfield<15, 0> si;
55 Bitfield<15, 0> d;
56
57 // Special purpose register identifier
58 Bitfield<20, 11> spr;
59 Bitfield<25, 2> li;
60 Bitfield<1> aa;
61 Bitfield<25, 23> bf;
62 Bitfield<15, 2> bd;
63 Bitfield<25, 21> bo;
64 Bitfield<20, 16> bi;
65 Bitfield<20, 18> bfa;
66
67 // Record bits
68 Bitfield<0> rc31;
69 Bitfield<10> oe;
70
71 // Condition register fields
72 Bitfield<25, 21> bt;
73 Bitfield<20, 16> ba;
74 Bitfield<15, 11> bb;
75
76 // FXM field for mtcrf instruction
77 Bitfield<19, 12> fxm;
78EndBitUnion(ExtMachInst)
79
80// typedef uint64_t LargestRead;
81// // Need to use 64 bits to make sure that read requests get handled properly
82
83// typedef int RegContextParam;
84// typedef int RegContextVal;
85
86struct CoreSpecific {
87};
88
89} // PowerISA namspace
90
91#endif // __ARCH_POWER_TYPES_HH__