remote_gdb.cc (12455:c88f0b37f433) remote_gdb.cc (13611:c8b7847b4171)
1/*
2 * Copyright 2015 LabWare
3 * Copyright 2014 Google, Inc.
4 * Copyright (c) 2010 ARM Limited
5 * All rights reserved
6 *
7 * The license below extends only to copyright in the software and shall
8 * not be construed as granting a license to any other intellectual

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179 // Default order on 32-bit PowerPC:
180 // R0-R31 (32-bit each), F0-F31 (64-bit IEEE754 double),
181 // PC, MSR, CR, LR, CTR, XER (32-bit each)
182
183 for (int i = 0; i < NumIntArchRegs; i++)
184 r.gpr[i] = htobe((uint32_t)context->readIntReg(i));
185
186 for (int i = 0; i < NumFloatArchRegs; i++)
1/*
2 * Copyright 2015 LabWare
3 * Copyright 2014 Google, Inc.
4 * Copyright (c) 2010 ARM Limited
5 * All rights reserved
6 *
7 * The license below extends only to copyright in the software and shall
8 * not be construed as granting a license to any other intellectual

--- 170 unchanged lines hidden (view full) ---

179 // Default order on 32-bit PowerPC:
180 // R0-R31 (32-bit each), F0-F31 (64-bit IEEE754 double),
181 // PC, MSR, CR, LR, CTR, XER (32-bit each)
182
183 for (int i = 0; i < NumIntArchRegs; i++)
184 r.gpr[i] = htobe((uint32_t)context->readIntReg(i));
185
186 for (int i = 0; i < NumFloatArchRegs; i++)
187 r.fpr[i] = context->readFloatRegBits(i);
187 r.fpr[i] = context->readFloatReg(i);
188
189 r.pc = htobe((uint32_t)context->pcState().pc());
190 r.msr = 0; // Is MSR modeled?
191 r.cr = htobe((uint32_t)context->readIntReg(INTREG_CR));
192 r.lr = htobe((uint32_t)context->readIntReg(INTREG_LR));
193 r.ctr = htobe((uint32_t)context->readIntReg(INTREG_CTR));
194 r.xer = htobe((uint32_t)context->readIntReg(INTREG_XER));
195}
196
197void
198RemoteGDB::PowerGdbRegCache::setRegs(ThreadContext *context) const
199{
200 DPRINTF(GDBAcc, "setRegs in remotegdb \n");
201
202 for (int i = 0; i < NumIntArchRegs; i++)
203 context->setIntReg(i, betoh(r.gpr[i]));
204
205 for (int i = 0; i < NumFloatArchRegs; i++)
188
189 r.pc = htobe((uint32_t)context->pcState().pc());
190 r.msr = 0; // Is MSR modeled?
191 r.cr = htobe((uint32_t)context->readIntReg(INTREG_CR));
192 r.lr = htobe((uint32_t)context->readIntReg(INTREG_LR));
193 r.ctr = htobe((uint32_t)context->readIntReg(INTREG_CTR));
194 r.xer = htobe((uint32_t)context->readIntReg(INTREG_XER));
195}
196
197void
198RemoteGDB::PowerGdbRegCache::setRegs(ThreadContext *context) const
199{
200 DPRINTF(GDBAcc, "setRegs in remotegdb \n");
201
202 for (int i = 0; i < NumIntArchRegs; i++)
203 context->setIntReg(i, betoh(r.gpr[i]));
204
205 for (int i = 0; i < NumFloatArchRegs; i++)
206 context->setFloatRegBits(i, r.fpr[i]);
206 context->setFloatReg(i, r.fpr[i]);
207
208 context->pcState(betoh(r.pc));
209 // Is MSR modeled?
210 context->setIntReg(INTREG_CR, betoh(r.cr));
211 context->setIntReg(INTREG_LR, betoh(r.lr));
212 context->setIntReg(INTREG_CTR, betoh(r.ctr));
213 context->setIntReg(INTREG_XER, betoh(r.xer));
214}
215
216BaseGdbRegCache*
217RemoteGDB::gdbRegs()
218{
219 return &regCache;
220}
221
207
208 context->pcState(betoh(r.pc));
209 // Is MSR modeled?
210 context->setIntReg(INTREG_CR, betoh(r.cr));
211 context->setIntReg(INTREG_LR, betoh(r.lr));
212 context->setIntReg(INTREG_CTR, betoh(r.ctr));
213 context->setIntReg(INTREG_XER, betoh(r.xer));
214}
215
216BaseGdbRegCache*
217RemoteGDB::gdbRegs()
218{
219 return &regCache;
220}
221