registers.hh (9046:a1104cc13db2) | registers.hh (9065:c1375b05faf1) |
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1/* 2 * Copyright (c) 2009 The University of Edinburgh 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 24 unchanged lines hidden (view full) --- 33 34#include "arch/power/generated/max_inst_regs.hh" 35#include "arch/power/miscregs.hh" 36 37namespace PowerISA { 38 39using PowerISAInst::MaxInstSrcRegs; 40using PowerISAInst::MaxInstDestRegs; | 1/* 2 * Copyright (c) 2009 The University of Edinburgh 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 24 unchanged lines hidden (view full) --- 33 34#include "arch/power/generated/max_inst_regs.hh" 35#include "arch/power/miscregs.hh" 36 37namespace PowerISA { 38 39using PowerISAInst::MaxInstSrcRegs; 40using PowerISAInst::MaxInstDestRegs; |
41using PowerISAInst::MaxMiscDestRegs; | |
42 | 41 |
42// Power writes a misc register outside of the isa parser, so it can't 43// be detected by it. Manually add it here. 44const int MaxMiscDestRegs = PowerISAInst::MaxMiscDestRegs + 1; 45 |
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43typedef uint8_t RegIndex; 44 45typedef uint64_t IntReg; 46 47// Floating point register file entry type 48typedef uint64_t FloatRegBits; 49typedef double FloatReg; 50typedef uint64_t MiscReg; --- 57 unchanged lines hidden --- | 46typedef uint8_t RegIndex; 47 48typedef uint64_t IntReg; 49 50// Floating point register file entry type 51typedef uint64_t FloatRegBits; 52typedef double FloatReg; 53typedef uint64_t MiscReg; --- 57 unchanged lines hidden --- |