1/*
2 * Copyright (c) 2009 The University of Edinburgh
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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38
39using PowerISAInst::MaxInstSrcRegs;
40using PowerISAInst::MaxInstDestRegs;
41
42// Power writes a misc register outside of the isa parser, so it can't
43// be detected by it. Manually add it here.
44const int MaxMiscDestRegs = PowerISAInst::MaxMiscDestRegs + 1;
45
46typedef uint8_t RegIndex;
47
46typedef uint64_t IntReg;
47
48// Floating point register file entry type
49typedef uint64_t FloatRegBits;
50typedef double FloatReg;
51typedef uint64_t MiscReg;
52
53// dummy typedef since we don't have CC regs

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80
81// There isn't one in Power, but we need to define one somewhere
82const int ZeroReg = NumIntRegs - 1;
83
84const int SyscallNumReg = 0;
85const int SyscallPseudoReturnReg = 3;
86const int SyscallSuccessReg = 3;
87
90// These help enumerate all the registers for dependence tracking.
91const int FP_Reg_Base = NumIntRegs;
92const int CC_Reg_Base = FP_Reg_Base + NumFloatRegs;
93const int Misc_Reg_Base = CC_Reg_Base + NumCCRegs; // NumCCRegs == 0
94const int Max_Reg_Index = Misc_Reg_Base + NumMiscRegs;
95
88typedef union {
89 IntReg intreg;
90 FloatReg fpreg;
91 MiscReg ctrlreg;
92} AnyReg;
93
94enum MiscIntRegNums {
95 INTREG_CR = NumIntArchRegs,

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