1/*
2 * Copyright (c) 2009 The University of Edinburgh
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Timothy M. Jones
29 */
30
31#ifndef __ARCH_POWER_REGISTERS_HH__
32#define __ARCH_POWER_REGISTERS_HH__
33
34#include "arch/generic/vec_reg.hh"
35#include "arch/power/generated/max_inst_regs.hh"
36#include "arch/power/miscregs.hh"
37#include "base/types.hh"
38
39namespace PowerISA {
40
41using PowerISAInst::MaxInstSrcRegs;

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49
50// Floating point register file entry type
51typedef RegVal FloatRegBits;
52typedef RegVal MiscReg;
53
54// dummy typedef since we don't have CC regs
55typedef uint8_t CCReg;
56
57// dummy typedefs since we don't have vector regs
58constexpr unsigned NumVecElemPerVecReg = 2;
59using VecElem = uint32_t;
60using VecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, false>;
61using ConstVecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, true>;
62using VecRegContainer = VecReg::Container;
63// This has to be one to prevent warnings that are treated as errors
64constexpr unsigned NumVecRegs = 1;
65
66// Constants Related to the number of registers
67const int NumIntArchRegs = 32;
68
69// CR, XER, LR, CTR, FPSCR, RSV, RSV-LEN, RSV-ADDR
70// and zero register, which doesn't actually exist but needs a number
71const int NumIntSpecialRegs = 9;
72const int NumFloatArchRegs = 32;
73const int NumFloatSpecialRegs = 0;
74const int NumInternalProcRegs = 0;
75
76const int NumIntRegs = NumIntArchRegs + NumIntSpecialRegs;
77const int NumFloatRegs = NumFloatArchRegs + NumFloatSpecialRegs;
78const int NumCCRegs = 0;
79const int NumMiscRegs = NUM_MISCREGS;
80
81// Semantically meaningful register indices
82const int ReturnValueReg = 3;
83const int ArgumentReg0 = 3;
84const int ArgumentReg1 = 4;
85const int ArgumentReg2 = 5;

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