1/*
2 * Copyright (c) 2009 The University of Edinburgh
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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29 */
30
31#ifndef __ARCH_POWER_REGISTERS_HH__
32#define __ARCH_POWER_REGISTERS_HH__
33
34#include "arch/generic/vec_reg.hh"
35#include "arch/power/generated/max_inst_regs.hh"
36#include "arch/power/miscregs.hh"
37
38namespace PowerISA {
39
40using PowerISAInst::MaxInstSrcRegs;
41using PowerISAInst::MaxInstDestRegs;
42
43// Power writes a misc register outside of the isa parser, so it can't
44// be detected by it. Manually add it here.
45const int MaxMiscDestRegs = PowerISAInst::MaxMiscDestRegs + 1;
46
47typedef uint64_t IntReg;
48
49// Floating point register file entry type
50typedef uint64_t FloatRegBits;
51typedef double FloatReg;
52typedef uint64_t MiscReg;
53
54// dummy typedef since we don't have CC regs
55typedef uint8_t CCReg;
56
57// dummy typedefs since we don't have vector regs
58constexpr unsigned NumVecElemPerVecReg = 2;
59using VecElem = uint32_t;
60using VecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, false>;

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