isa_traits.hh (8542:7230ff0738e3) | isa_traits.hh (9040:cdfe09f9bdee) |
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1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * Copyright (c) 2007-2008 The Florida State University 4 * Copyright (c) 2009 The University of Edinburgh 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are --- 52 unchanged lines hidden (view full) --- 61const Addr NPtePage = ULL(1) << NPtePageShift; 62const Addr PteMask = NPtePage - 1; 63 64const int LogVMPageSize = 12; // 4K bytes 65const int VMPageSize = (1 << LogVMPageSize); 66 67const int MachineBytes = 4; 68 | 1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * Copyright (c) 2007-2008 The Florida State University 4 * Copyright (c) 2009 The University of Edinburgh 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are --- 52 unchanged lines hidden (view full) --- 61const Addr NPtePage = ULL(1) << NPtePageShift; 62const Addr PteMask = NPtePage - 1; 63 64const int LogVMPageSize = 12; // 4K bytes 65const int VMPageSize = (1 << LogVMPageSize); 66 67const int MachineBytes = 4; 68 |
69// This is ori 0, 0, 0 70const ExtMachInst NoopMachInst = 0x60000000; | 69const extern StaticInstPtr NoopStaticInst; |
71 72// Memory accesses can be unaligned 73const bool HasUnalignedMemAcc = true; 74 75} // namespace PowerISA 76 77#endif // __ARCH_POWER_ISA_TRAITS_HH__ | 70 71// Memory accesses can be unaligned 72const bool HasUnalignedMemAcc = true; 73 74} // namespace PowerISA 75 76#endif // __ARCH_POWER_ISA_TRAITS_HH__ |