decoder.isa (8917:a16ba72db7d0) decoder.isa (11327:1e7b883dffc6)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2009 The University of Edinburgh
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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304 }
305
306 format StoreIndexOp {
307 215: stbx({{ Mem_ub = Rs_ub; }});
308 407: sthx({{ Mem_uh = Rs_uh; }});
309 151: stwx({{ Mem = Rs; }});
310 150: stwcx({{
311 bool store_performed = false;
1// -*- mode:c++ -*-
2
3// Copyright (c) 2009 The University of Edinburgh
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

--- 295 unchanged lines hidden (view full) ---

304 }
305
306 format StoreIndexOp {
307 215: stbx({{ Mem_ub = Rs_ub; }});
308 407: sthx({{ Mem_uh = Rs_uh; }});
309 151: stwx({{ Mem = Rs; }});
310 150: stwcx({{
311 bool store_performed = false;
312 Mem = Rs;
312 if (Rsv) {
313 if (RsvLen == 4) {
314 if (RsvAddr == EA) {
313 if (Rsv) {
314 if (RsvLen == 4) {
315 if (RsvAddr == EA) {
315 Mem = Rs;
316 store_performed = true;
317 }
318 }
319 }
320 Xer xer = XER;
321 Cr cr = CR;
322 cr.cr0 = ((store_performed ? 0x2 : 0x0) | xer.so);
323 CR = cr;

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316 store_performed = true;
317 }
318 }
319 }
320 Xer xer = XER;
321 Cr cr = CR;
322 cr.cr0 = ((store_performed ? 0x2 : 0x0) | xer.so);
323 CR = cr;

--- 271 unchanged lines hidden ---