1// -*- mode:c++ -*-
2
3// Copyright (c) 2009 The University of Edinburgh
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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83 computeCA = true);
84 200: subfze({{ ~Ra }}, {{ xer.ca }},
85 computeCA = true);
86 }
87
88 // Arithmetic instructions all use source registers Ra and Rb,
89 // with destination register Rt.
90 format IntArithOp {
91 75: mulhw({{ int64_t prod = Ra_sq * Rb_sq; Rt = prod >> 32; }});
92 11: mulhwu({{ uint64_t prod = Ra_uq * Rb_uq; Rt = prod >> 32; }});
93 235: mullw({{ int64_t prod = Ra_sq * Rb_sq; Rt = prod; }});
94 747: mullwo({{ int64_t src1 = Ra_sq; int64_t src2 = Rb; int64_t prod = src1 * src2; Rt = prod; }},
95 true);
96
97 491: divw({{
98 int32_t src1 = Ra_sw;
99 int32_t src2 = Rb_sw;
100 if ((src1 != 0x80000000 || src2 != 0xffffffff)
101 && src2 != 0) {
102 Rt = src1 / src2;
103 } else {

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554 FPSCR = fpscr;
555 CR = insertCRField(CR, BF, c);
556 }});
557 }
558
559 format FloatRCCheckOp {
560 72: fmr({{ Ft = Fb; }});
561 264: fabs({{
562 Ft_uq = Fb_uq;
563 Ft_uq = insertBits(Ft_uq, 63, 0); }});
564 136: fnabs({{
565 Ft_uq = Fb_uq;
566 Ft_uq = insertBits(Ft_uq, 63, 1); }});
567 40: fneg({{ Ft = -Fb; }});
568 8: fcpsgn({{
569 Ft_uq = Fb_uq;
570 Ft_uq = insertBits(Ft_uq, 63, Fa_uq<63:63>);
571 }});
572 583: mffs({{ Ft_uq = FPSCR; }});
573 134: mtfsfi({{
574 FPSCR = insertCRField(FPSCR, BF + (8 * (1 - W_FIELD)),
575 U_FIELD);
576 }});
577 711: mtfsf({{
578 if (L_FIELD == 1) { FPSCR = Fb_uq; }
579 else {
580 for (int i = 0; i < 8; ++i) {
581 if (bits(FLM, i) == 1) {
582 int k = 4 * (i + (8 * (1 - W_FIELD)));
583 FPSCR = insertBits(FPSCR, k + 3, k,
584 bits(Fb_uq, k + 3, k));
585 }
586 }
587 }
588 }});
589 70: mtfsb0({{ FPSCR = insertBits(FPSCR, 31 - BT, 0); }});
590 38: mtfsb1({{ FPSCR = insertBits(FPSCR, 31 - BT, 1); }});
591 }
592 }
593 }
594}