1// -*- mode:c++ -*-
2
3// Copyright (c) 2009 The University of Edinburgh
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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376 29: andis_({{ Ra = Rs & (uimm << 16); }},
377 true);
378 }
379
380 16: decode AA {
381
382 // Conditionally branch relative to PC based on CR and CTR.
383 format BranchPCRelCondCtr {
384 0: bc({{ NPC = (uint32_t)(PC + disp); }});
385 }
386
387 // Conditionally branch to fixed address based on CR and CTR.
388 format BranchNonPCRelCondCtr {
389 1: bca({{ NPC = targetAddr; }});
390 }
391 }
392
393 18: decode AA {
394
395 // Unconditionally branch relative to PC.
396 format BranchPCRel {
397 0: b({{ NPC = (uint32_t)(PC + disp); }});
398 }
399
400 // Unconditionally branch to fixed address.
401 format BranchNonPCRel {
402 1: ba({{ NPC = targetAddr; }});
403 }
404 }
405
406 19: decode XO_XO {
407
408 // Conditionally branch to address in LR based on CR and CTR.
409 format BranchLrCondCtr {
410 16: bclr({{ NPC = LR & 0xfffffffc; }});
411 }
412
413 // Conditionally branch to address in CTR based on CR.
414 format BranchCtrCond {
415 528: bcctr({{ NPC = CTR & 0xfffffffc; }});
416 }
417
418 // Condition register manipulation instructions.
419 format CondLogicOp {
420 257: crand({{
421 uint32_t crBa = bits(CR, 31 - ba);
422 uint32_t crBb = bits(CR, 31 - bb);
423 CR = insertBits(CR, 31 - bt, crBa & crBb);

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