isa.hh (13610:5d5404ac6288) | isa.hh (13617:34a793c681ce) |
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1/* 2 * Copyright (c) 2009 The Regents of The University of Michigan 3 * Copyright (c) 2009 The University of Edinburgh 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 36 unchanged lines hidden (view full) --- 45class EventManager; 46 47namespace PowerISA 48{ 49 50class ISA : public SimObject 51{ 52 protected: | 1/* 2 * Copyright (c) 2009 The Regents of The University of Michigan 3 * Copyright (c) 2009 The University of Edinburgh 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 36 unchanged lines hidden (view full) --- 45class EventManager; 46 47namespace PowerISA 48{ 49 50class ISA : public SimObject 51{ 52 protected: |
53 MiscReg dummy; 54 MiscReg miscRegs[NumMiscRegs]; | 53 RegVal dummy; 54 RegVal miscRegs[NumMiscRegs]; |
55 56 public: 57 typedef PowerISAParams Params; 58 59 void 60 clear() 61 { 62 } 63 | 55 56 public: 57 typedef PowerISAParams Params; 58 59 void 60 clear() 61 { 62 } 63 |
64 MiscReg | 64 RegVal |
65 readMiscRegNoEffect(int misc_reg) const 66 { 67 fatal("Power does not currently have any misc regs defined\n"); 68 return dummy; 69 } 70 | 65 readMiscRegNoEffect(int misc_reg) const 66 { 67 fatal("Power does not currently have any misc regs defined\n"); 68 return dummy; 69 } 70 |
71 MiscReg | 71 RegVal |
72 readMiscReg(int misc_reg, ThreadContext *tc) 73 { 74 fatal("Power does not currently have any misc regs defined\n"); 75 return dummy; 76 } 77 78 void | 72 readMiscReg(int misc_reg, ThreadContext *tc) 73 { 74 fatal("Power does not currently have any misc regs defined\n"); 75 return dummy; 76 } 77 78 void |
79 setMiscRegNoEffect(int misc_reg, MiscReg val) | 79 setMiscRegNoEffect(int misc_reg, RegVal val) |
80 { 81 fatal("Power does not currently have any misc regs defined\n"); 82 } 83 84 void | 80 { 81 fatal("Power does not currently have any misc regs defined\n"); 82 } 83 84 void |
85 setMiscReg(int misc_reg, MiscReg val, ThreadContext *tc) | 85 setMiscReg(int misc_reg, RegVal val, ThreadContext *tc) |
86 { 87 fatal("Power does not currently have any misc regs defined\n"); 88 } 89 90 RegId flattenRegId(const RegId& regId) const { return regId; } 91 92 int 93 flattenIntIndex(int reg) const --- 54 unchanged lines hidden --- | 86 { 87 fatal("Power does not currently have any misc regs defined\n"); 88 } 89 90 RegId flattenRegId(const RegId& regId) const { return regId; } 91 92 int 93 flattenIntIndex(int reg) const --- 54 unchanged lines hidden --- |