1/*
2 * Copyright (c) 2009 The Regents of The University of Michigan
3 * Copyright (c) 2009 The University of Edinburgh
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Gabe Black
30 * Timothy M. Jones
31 */
32
33#ifndef __ARCH_POWER_ISA_HH__
34#define __ARCH_POWER_ISA_HH__
35
36#include "arch/power/registers.hh"
37#include "arch/power/types.hh"
38#include "base/misc.hh"
39#include "cpu/reg_class.hh"
40#include "sim/sim_object.hh"
41
42struct PowerISAParams;
43class ThreadContext;
44class Checkpoint;
45class EventManager;
46
47namespace PowerISA
48{
49
50class ISA : public SimObject
51{
52 protected:
53 MiscReg dummy;
54 MiscReg miscRegs[NumMiscRegs];
55
56 public:
57 typedef PowerISAParams Params;
58
59 void
60 clear()
61 {
62 }
63
64 MiscReg
65 readMiscRegNoEffect(int misc_reg) const
66 {
67 fatal("Power does not currently have any misc regs defined\n");
68 return dummy;
69 }
70
71 MiscReg
72 readMiscReg(int misc_reg, ThreadContext *tc)
73 {
74 fatal("Power does not currently have any misc regs defined\n");
75 return dummy;
76 }
77
78 void
79 setMiscRegNoEffect(int misc_reg, const MiscReg &val)
80 {
81 fatal("Power does not currently have any misc regs defined\n");
82 }
83
84 void
85 setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc)
86 {
87 fatal("Power does not currently have any misc regs defined\n");
88 }
89
90 RegId flattenRegId(const RegId& regId) const { return regId; }
91
92 int
93 flattenIntIndex(int reg) const
94 {
95 return reg;
96 }
97
98 int
99 flattenFloatIndex(int reg) const
100 {
101 return reg;
102 }
103
104 // dummy
105 int
106 flattenCCIndex(int reg) const
107 {
108 return reg;
109 }
110
111 int
112 flattenMiscIndex(int reg) const
113 {
114 return reg;
115 }
116
117 void startup(ThreadContext *tc) {}
118
119 /// Explicitly import the otherwise hidden startup
120 using SimObject::startup;
121
122 const Params *params() const;
123
124 ISA(Params *p);
125};
126
127} // namespace PowerISA
128
129#endif // __ARCH_POWER_ISA_HH__