static_inst.hh (12104:edd63f9c6184) static_inst.hh (12614:0bc465e1f5fb)
1/*
2 * Copyright (c) 2009 The University of Edinburgh
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Timothy M. Jones
29 */
30
31#ifndef __ARCH_POWER_INSTS_STATICINST_HH__
32#define __ARCH_POWER_INSTS_STATICINST_HH__
33
34#include "base/trace.hh"
35#include "cpu/static_inst.hh"
36
37namespace PowerISA
38{
39
40class PowerStaticInst : public StaticInst
41{
42 protected:
43
44 // Constructor
45 PowerStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass)
46 : StaticInst(mnem, _machInst, __opClass)
47 {
48 }
49
50 // Insert a condition value into a CR (condition register) field
51 inline uint32_t
52 insertCRField(uint32_t cr, uint32_t bf, uint32_t value) const
53 {
54 uint32_t bits = value << ((7 - bf) * 4);
55 uint32_t mask = ~(0xf << ((7 - bf) * 4));
56 return (cr & mask) | bits;
57 }
58
59 /// Print a register name for disassembly given the unique
60 /// dependence tag number (FP or int).
61 void
62 printReg(std::ostream &os, RegId reg) const;
63
64 std::string
65 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
66
67 void
68 advancePC(PowerISA::PCState &pcState) const
69 {
70 pcState.advance();
71 }
1/*
2 * Copyright (c) 2009 The University of Edinburgh
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Timothy M. Jones
29 */
30
31#ifndef __ARCH_POWER_INSTS_STATICINST_HH__
32#define __ARCH_POWER_INSTS_STATICINST_HH__
33
34#include "base/trace.hh"
35#include "cpu/static_inst.hh"
36
37namespace PowerISA
38{
39
40class PowerStaticInst : public StaticInst
41{
42 protected:
43
44 // Constructor
45 PowerStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass)
46 : StaticInst(mnem, _machInst, __opClass)
47 {
48 }
49
50 // Insert a condition value into a CR (condition register) field
51 inline uint32_t
52 insertCRField(uint32_t cr, uint32_t bf, uint32_t value) const
53 {
54 uint32_t bits = value << ((7 - bf) * 4);
55 uint32_t mask = ~(0xf << ((7 - bf) * 4));
56 return (cr & mask) | bits;
57 }
58
59 /// Print a register name for disassembly given the unique
60 /// dependence tag number (FP or int).
61 void
62 printReg(std::ostream &os, RegId reg) const;
63
64 std::string
65 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
66
67 void
68 advancePC(PowerISA::PCState &pcState) const
69 {
70 pcState.advance();
71 }
72
73 size_t
74 asBytes(void *buf, size_t max_size) override
75 {
76 return simpleAsBytes(buf, max_size, machInst);
77 }
72};
73
74} // namespace PowerISA
75
76#endif //__ARCH_POWER_INSTS_STATICINST_HH__
78};
79
80} // namespace PowerISA
81
82#endif //__ARCH_POWER_INSTS_STATICINST_HH__