static_inst.cc (9920:028e4da64b42) | static_inst.cc (10934:5af8f40d8f2c) |
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1/* 2 * Copyright (c) 2009 The University of Edinburgh 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 43 unchanged lines hidden (view full) --- 52 case 1: ccprintf(os, "xer"); break; 53 case 2: ccprintf(os, "lr"); break; 54 case 3: ccprintf(os, "ctr"); break; 55 default: ccprintf(os, "unknown_reg"); 56 break; 57 } 58 case CCRegClass: 59 panic("printReg: POWER does not implement CCRegClass\n"); | 1/* 2 * Copyright (c) 2009 The University of Edinburgh 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 43 unchanged lines hidden (view full) --- 52 case 1: ccprintf(os, "xer"); break; 53 case 2: ccprintf(os, "lr"); break; 54 case 3: ccprintf(os, "ctr"); break; 55 default: ccprintf(os, "unknown_reg"); 56 break; 57 } 58 case CCRegClass: 59 panic("printReg: POWER does not implement CCRegClass\n"); |
60 case VectorRegClass: 61 panic("printReg: POWER does not implement VectorRegClass\n"); |
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60 } 61} 62 63std::string 64PowerStaticInst::generateDisassembly(Addr pc, 65 const SymbolTable *symtab) const 66{ 67 std::stringstream ss; 68 69 ccprintf(ss, "%-10s ", mnemonic); 70 71 return ss.str(); 72} | 62 } 63} 64 65std::string 66PowerStaticInst::generateDisassembly(Addr pc, 67 const SymbolTable *symtab) const 68{ 69 std::stringstream ss; 70 71 ccprintf(ss, "%-10s ", mnemonic); 72 73 return ss.str(); 74} |