static_inst.cc (9913:7f43babfde6a) static_inst.cc (9920:028e4da64b42)
1/*
2 * Copyright (c) 2009 The University of Edinburgh
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Timothy M. Jones
30 */
31
32#include "arch/power/insts/static_inst.hh"
33#include "cpu/reg_class.hh"
34
35using namespace PowerISA;
36
37void
38PowerStaticInst::printReg(std::ostream &os, int reg) const
39{
40 RegIndex rel_reg;
41
42 switch (regIdxToClass(reg, &rel_reg)) {
43 case IntRegClass:
44 ccprintf(os, "r%d", rel_reg);
45 break;
46 case FloatRegClass:
47 ccprintf(os, "f%d", rel_reg);
48 break;
49 case MiscRegClass:
50 switch (rel_reg) {
51 case 0: ccprintf(os, "cr"); break;
52 case 1: ccprintf(os, "xer"); break;
53 case 2: ccprintf(os, "lr"); break;
54 case 3: ccprintf(os, "ctr"); break;
55 default: ccprintf(os, "unknown_reg");
56 break;
57 }
1/*
2 * Copyright (c) 2009 The University of Edinburgh
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Timothy M. Jones
30 */
31
32#include "arch/power/insts/static_inst.hh"
33#include "cpu/reg_class.hh"
34
35using namespace PowerISA;
36
37void
38PowerStaticInst::printReg(std::ostream &os, int reg) const
39{
40 RegIndex rel_reg;
41
42 switch (regIdxToClass(reg, &rel_reg)) {
43 case IntRegClass:
44 ccprintf(os, "r%d", rel_reg);
45 break;
46 case FloatRegClass:
47 ccprintf(os, "f%d", rel_reg);
48 break;
49 case MiscRegClass:
50 switch (rel_reg) {
51 case 0: ccprintf(os, "cr"); break;
52 case 1: ccprintf(os, "xer"); break;
53 case 2: ccprintf(os, "lr"); break;
54 case 3: ccprintf(os, "ctr"); break;
55 default: ccprintf(os, "unknown_reg");
56 break;
57 }
58 case CCRegClass:
59 panic("printReg: POWER does not implement CCRegClass\n");
58 }
59}
60
61std::string
62PowerStaticInst::generateDisassembly(Addr pc,
63 const SymbolTable *symtab) const
64{
65 std::stringstream ss;
66
67 ccprintf(ss, "%-10s ", mnemonic);
68
69 return ss.str();
70}
60 }
61}
62
63std::string
64PowerStaticInst::generateDisassembly(Addr pc,
65 const SymbolTable *symtab) const
66{
67 std::stringstream ss;
68
69 ccprintf(ss, "%-10s ", mnemonic);
70
71 return ss.str();
72}