1/*
2 * Copyright (c) 2012 Google
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __ARCH_POWER_DECODER_HH__
32#define __ARCH_POWER_DECODER_HH__
33
34#include "arch/generic/decode_cache.hh"
35#include "arch/types.hh"
36#include "cpu/static_inst.hh"
37
38namespace PowerISA
39{
40
41class Decoder
42{
43 protected:
44 // The extended machine instruction being generated
45 ExtMachInst emi;
46 bool instDone;
47
48 public:
49 Decoder() : instDone(false)
50 {
51 }
52
53 void
54 process()
55 {
56 }
57
58 void
59 reset()
60 {
61 instDone = false;
62 }
63
64 // Use this to give data to the predecoder. This should be used
65 // when there is control flow.
66 void
67 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
68 {
69 emi = inst;
70 instDone = true;
71 }
72
73 // Use this to give data to the predecoder. This should be used
74 // when instructions are executed in order.
75 void
76 moreBytes(MachInst machInst)
77 {
78 moreBytes(0, 0, machInst);
79 }
80
81 bool
82 needMoreBytes()
83 {
84 return true;
85 }
86
87 bool
88 instReady()
89 {
90 return instDone;
91 }
| 1/*
2 * Copyright (c) 2012 Google
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __ARCH_POWER_DECODER_HH__
32#define __ARCH_POWER_DECODER_HH__
33
34#include "arch/generic/decode_cache.hh"
35#include "arch/types.hh"
36#include "cpu/static_inst.hh"
37
38namespace PowerISA
39{
40
41class Decoder
42{
43 protected:
44 // The extended machine instruction being generated
45 ExtMachInst emi;
46 bool instDone;
47
48 public:
49 Decoder() : instDone(false)
50 {
51 }
52
53 void
54 process()
55 {
56 }
57
58 void
59 reset()
60 {
61 instDone = false;
62 }
63
64 // Use this to give data to the predecoder. This should be used
65 // when there is control flow.
66 void
67 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
68 {
69 emi = inst;
70 instDone = true;
71 }
72
73 // Use this to give data to the predecoder. This should be used
74 // when instructions are executed in order.
75 void
76 moreBytes(MachInst machInst)
77 {
78 moreBytes(0, 0, machInst);
79 }
80
81 bool
82 needMoreBytes()
83 {
84 return true;
85 }
86
87 bool
88 instReady()
89 {
90 return instDone;
91 }
|
92 protected:
93 /// A cache of decoded instruction objects.
94 static GenericISA::BasicDecodeCache defaultCache;
95
96 public:
97 StaticInstPtr decodeInst(ExtMachInst mach_inst);
98
99 /// Decode a machine instruction.
100 /// @param mach_inst The binary instruction to decode.
101 /// @retval A pointer to the corresponding StaticInst object.
102 StaticInstPtr
103 decode(ExtMachInst mach_inst, Addr addr)
104 {
105 return defaultCache.decode(this, mach_inst, addr);
106 }
107
108 StaticInstPtr
109 decode(PowerISA::PCState &nextPC)
110 {
111 if (!instDone)
112 return NULL;
113 instDone = false;
114 return decode(emi, nextPC.instAddr());
115 }
116};
117
118} // namespace PowerISA
119
120#endif // __ARCH_POWER_DECODER_HH__
| 95 protected:
96 /// A cache of decoded instruction objects.
97 static GenericISA::BasicDecodeCache defaultCache;
98
99 public:
100 StaticInstPtr decodeInst(ExtMachInst mach_inst);
101
102 /// Decode a machine instruction.
103 /// @param mach_inst The binary instruction to decode.
104 /// @retval A pointer to the corresponding StaticInst object.
105 StaticInstPtr
106 decode(ExtMachInst mach_inst, Addr addr)
107 {
108 return defaultCache.decode(this, mach_inst, addr);
109 }
110
111 StaticInstPtr
112 decode(PowerISA::PCState &nextPC)
113 {
114 if (!instDone)
115 return NULL;
116 instDone = false;
117 return decode(emi, nextPC.instAddr());
118 }
119};
120
121} // namespace PowerISA
122
123#endif // __ARCH_POWER_DECODER_HH__
|