registers.hh (13592:b8972ccebd63) | registers.hh (13610:5d5404ac6288) |
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1/* 2 * Copyright (c) 2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 26 unchanged lines hidden (view full) --- 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * Authors: Andreas Hansson 38 */ 39 40#ifndef __ARCH_NULL_REGISTERS_HH__ 41#define __ARCH_NULL_REGISTERS_HH__ 42 | 1/* 2 * Copyright (c) 2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 26 unchanged lines hidden (view full) --- 35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 * 37 * Authors: Andreas Hansson 38 */ 39 40#ifndef __ARCH_NULL_REGISTERS_HH__ 41#define __ARCH_NULL_REGISTERS_HH__ 42 |
43#include "arch/generic/vec_pred_reg.hh" |
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43#include "arch/generic/vec_reg.hh" 44#include "arch/types.hh" 45#include "base/types.hh" 46 47namespace NullISA { 48 49typedef RegVal IntReg; 50typedef RegVal FloatRegBits; 51typedef uint8_t CCReg; 52typedef RegVal MiscReg; 53const RegIndex ZeroReg = 0; 54 | 44#include "arch/generic/vec_reg.hh" 45#include "arch/types.hh" 46#include "base/types.hh" 47 48namespace NullISA { 49 50typedef RegVal IntReg; 51typedef RegVal FloatRegBits; 52typedef uint8_t CCReg; 53typedef RegVal MiscReg; 54const RegIndex ZeroReg = 0; 55 |
55// dummy typedefs since we don't have vector regs 56constexpr unsigned NumVecElemPerVecReg = 2; 57using VecElem = uint32_t; 58using VecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, false>; 59using ConstVecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, true>; 60using VecRegContainer = VecReg::Container; 61// This has to be one to prevent warnings that are treated as errors 62constexpr unsigned NumVecRegs = 1; | 56// Not applicable to null 57using VecElem = ::DummyVecElem; 58using VecReg = ::DummyVecReg; 59using ConstVecReg = ::DummyConstVecReg; 60using VecRegContainer = ::DummyVecRegContainer; 61constexpr unsigned NumVecElemPerVecReg = ::DummyNumVecElemPerVecReg; 62constexpr size_t VecRegSizeBytes = ::DummyVecRegSizeBytes; |
63 | 63 |
64// Not applicable to null 65using VecPredReg = ::DummyVecPredReg; 66using ConstVecPredReg = ::DummyConstVecPredReg; 67using VecPredRegContainer = ::DummyVecPredRegContainer; 68constexpr size_t VecPredRegSizeBits = ::DummyVecPredRegSizeBits; 69constexpr bool VecPredRegHasPackedRepr = ::DummyVecPredRegHasPackedRepr; 70 |
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64} 65 66#endif // __ARCH_NULL_REGISTERS_HH__ | 71} 72 73#endif // __ARCH_NULL_REGISTERS_HH__ |