vtophys.hh (5268:5bfc53fe60e7) vtophys.hh (8229:78bf55f23338)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007 MIPS Technologies, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 23 unchanged lines hidden (view full) ---

32 */
33
34#ifndef __ARCH_MIPS_VTOPHYS_H__
35#define __ARCH_MIPS_VTOPHYS_H__
36
37#include "arch/mips/isa_traits.hh"
38#include "arch/mips/utility.hh"
39
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007 MIPS Technologies, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 23 unchanged lines hidden (view full) ---

32 */
33
34#ifndef __ARCH_MIPS_VTOPHYS_H__
35#define __ARCH_MIPS_VTOPHYS_H__
36
37#include "arch/mips/isa_traits.hh"
38#include "arch/mips/utility.hh"
39
40
41class ThreadContext;
42class FunctionalPort;
43
44namespace MipsISA {
45 inline Addr PteAddr(Addr a) { return (a & PteMask) << PteShift; }
46
47 // User Virtual
48 inline bool IsUSeg(Addr a) { return USegBase <= a && a <= USegEnd; }

--- 20 unchanged lines hidden --- 		40class ThreadContext;
41class FunctionalPort;
42
43namespace MipsISA {
44 inline Addr PteAddr(Addr a) { return (a & PteMask) << PteShift; }
45
46 // User Virtual
47 inline bool IsUSeg(Addr a) { return USegBase <= a && a <= USegEnd; }

--- 20 unchanged lines hidden ---