utility.hh (2686:f0d591379ac3) utility.hh (2972:f84c6c5309ce)
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 19 unchanged lines hidden (view full) ---

28 * Authors: Nathan Binkert
29 * Steve Reinhardt
30 */
31
32#ifndef __ARCH_MIPS_UTILITY_HH__
33#define __ARCH_MIPS_UTILITY_HH__
34
35#include "arch/mips/types.hh"
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 19 unchanged lines hidden (view full) ---

28 * Authors: Nathan Binkert
29 * Steve Reinhardt
30 */
31
32#ifndef __ARCH_MIPS_UTILITY_HH__
33#define __ARCH_MIPS_UTILITY_HH__
34
35#include "arch/mips/types.hh"
36#include "arch/mips/constants.hh"
36#include "arch/mips/isa_traits.hh"
37#include "base/misc.hh"
37#include "base/misc.hh"
38//XXX This is needed for size_t. We should use something other than size_t
39#include "kern/linux/linux.hh"
38#include "sim/host.hh"
39
40namespace MipsISA {
41
42 //Floating Point Utility Functions
43 uint64_t fpConvert(ConvertType cvt_type, double fp_val);
44 double roundFP(double val, int digits);
45 double truncFP(double val);
46
47 bool getCondCode(uint32_t fcsr, int cc);
48 uint32_t genCCVector(uint32_t fcsr, int num, uint32_t cc_val);
49 uint32_t genInvalidVector(uint32_t fcsr);
50
51 bool isNan(void *val_ptr, int size);
52 bool isQnan(void *val_ptr, int size);
53 bool isSnan(void *val_ptr, int size);
40#include "sim/host.hh"
41
42namespace MipsISA {
43
44 //Floating Point Utility Functions
45 uint64_t fpConvert(ConvertType cvt_type, double fp_val);
46 double roundFP(double val, int digits);
47 double truncFP(double val);
48
49 bool getCondCode(uint32_t fcsr, int cc);
50 uint32_t genCCVector(uint32_t fcsr, int num, uint32_t cc_val);
51 uint32_t genInvalidVector(uint32_t fcsr);
52
53 bool isNan(void *val_ptr, int size);
54 bool isQnan(void *val_ptr, int size);
55 bool isSnan(void *val_ptr, int size);
56
57 /**
58 * Function to insure ISA semantics about 0 registers.
59 * @param tc The thread context.
60 */
61 template <class TC>
62 void zeroRegisters(TC *tc);
63
64 void copyRegs(ThreadContext *src, ThreadContext *dest);
65
66 // Instruction address compression hooks
67 static inline Addr realPCToFetchPC(const Addr &addr) {
68 return addr;
69 }
70
71 static inline Addr fetchPCToRealPC(const Addr &addr) {
72 return addr;
73 }
74
75 // the size of "fetched" instructions (not necessarily the size
76 // of real instructions for PISA)
77 static inline size_t fetchInstSize() {
78 return sizeof(MachInst);
79 }
80
81 static inline MachInst makeRegisterCopy(int dest, int src) {
82 panic("makeRegisterCopy not implemented");
83 return 0;
84 }
85
86 static inline ExtMachInst
87 makeExtMI(MachInst inst, const uint64_t &pc) {
88#if FULL_SYSTEM
89 ExtMachInst ext_inst = inst;
90 if (pc && 0x1)
91 return ext_inst|=(static_cast<ExtMachInst>(pc & 0x1) << 32);
92 else
93 return ext_inst;
94#else
95 return ExtMachInst(inst);
96#endif
97 }
54};
55
56
57#endif
98};
99
100
101#endif