1/*
2 * Copyright (c) 2007 MIPS Technologies, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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236
237void
238initCPU(ThreadContext *tc, int cpuId)
239{}
240
241void
242copyRegs(ThreadContext *src, ThreadContext *dest)
243{
244 panic("Copy Regs Not Implemented Yet\n");
245}
246
247void
248copyMiscRegs(ThreadContext *src, ThreadContext *dest)
249{
250 panic("Copy Misc. Regs Not Implemented Yet\n");
251}
252void
253skipFunction(ThreadContext *tc)
254{
255 TheISA::PCState newPC = tc->pcState();
256 newPC.set(tc->readIntReg(ReturnAddressReg));
257 tc->pcState(newPC);
258}
259
260
261} // namespace MipsISA