tlb.hh (7878:d3e6ebcccabf) | tlb.hh (8229:78bf55f23338) |
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1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * Copyright (c) 2007 MIPS Technologies, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 24 unchanged lines hidden (view full) --- 33 */ 34 35#ifndef __ARCH_MIPS_TLB_HH__ 36#define __ARCH_MIPS_TLB_HH__ 37 38#include <map> 39 40#include "arch/mips/isa_traits.hh" | 1/* 2 * Copyright (c) 2001-2005 The Regents of The University of Michigan 3 * Copyright (c) 2007 MIPS Technologies, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 24 unchanged lines hidden (view full) --- 33 */ 34 35#ifndef __ARCH_MIPS_TLB_HH__ 36#define __ARCH_MIPS_TLB_HH__ 37 38#include <map> 39 40#include "arch/mips/isa_traits.hh" |
41#include "arch/mips/pagetable.hh" |
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41#include "arch/mips/utility.hh" 42#include "arch/mips/vtophys.hh" | 42#include "arch/mips/utility.hh" 43#include "arch/mips/vtophys.hh" |
43#include "arch/mips/pagetable.hh" | |
44#include "base/statistics.hh" 45#include "mem/request.hh" 46#include "params/MipsTLB.hh" 47#include "sim/fault_fwd.hh" | 44#include "base/statistics.hh" 45#include "mem/request.hh" 46#include "params/MipsTLB.hh" 47#include "sim/fault_fwd.hh" |
48#include "sim/tlb.hh" | |
49#include "sim/sim_object.hh" | 48#include "sim/sim_object.hh" |
49#include "sim/tlb.hh" |
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50 51class ThreadContext; 52 53/* MIPS does not distinguish between a DTLB and an ITLB -> unified TLB 54 However, to maintain compatibility with other architectures, we'll 55 simply create an ITLB and DTLB that will point to the real TLB */ 56namespace MipsISA { 57 --- 96 unchanged lines hidden --- | 50 51class ThreadContext; 52 53/* MIPS does not distinguish between a DTLB and an ITLB -> unified TLB 54 However, to maintain compatibility with other architectures, we'll 55 simply create an ITLB and DTLB that will point to the real TLB */ 56namespace MipsISA { 57 --- 96 unchanged lines hidden --- |